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74LX1G08 Datasheet

  • 74LX1G08

  • LOW VOLTAGE CMOS SINGLE 2-INPUT AND GATE WITH 5V TOLERANT IN...

  • 10頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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74LX1G08
LOW VOLTAGE CMOS SINGLE 2-INPUT AND GATE
WITH 5V TOLERANT INPUT
s
s
s
s
s
s
s
s
5V TOLERANT INPUTS
HIGH SPEED: t
PD
= 4.5ns (MAX.) at V
CC
= 3V
LOW POWER DISSIPATION:
I
CC
= 1碌A(chǔ) (MAX.) at T
A
= 25擄C
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3V
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 1.65V to 5.5V
(1.2V Data Retention)
IMPROVED LATCH-UP IMMUNITY
SOT23-5
SC70-5
ORDER CODES
PACKAGE
SOT23-5L
SOT323-5L
T&R
74LX1G08STR
74LX1G08CTR
DESCRIPTION
The 74LX1G08 is a low voltage CMOS SINGLE
2-INPUT AND GATE fabricated with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
tecnology.
It is ideal for 1.65 to 5.5 V
CC
operations and low
power and low noise applications. The internal
circuit is composed of 3 stages including buffer
output, which provide high noise immunity and
stable output.
Power down protection is provided on input and
output and 0 to 7V can be accepted on inputs with
no regard to the supply voltage. It can be
interfaced to 5V signal environment for inputs in
mixed 3.3/5V system.
All inputs and outputs are equipped with
protection circuits against static discharge.
PIN CONNECTION AND IEC LOGIC SYMBOLS
October 2002
1/10

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