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74LVTH374MTC Datasheet

  • 74LVTH374MTC

  • Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs

  • 8頁

  • FAIRCHILD

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74LVT374 鈥?74LVTH374 Low Voltage Octal D-Type Flip-Flop with 3-STATE Outputs
September 1999
Revised March 2005
74LVT374 鈥?74LVTH374
Low Voltage Octal D-Type Flip-Flop
with 3-STATE Outputs
General Description
The LVT374 and LVTH374 are high-speed, low-power
octal D-type flip-flops featuring separate D-type inputs for
each flip-flop and 3-STATE outputs for bus-oriented appli-
cations. A buffered Clock (CP) and Output Enable (OE) are
common to all flip-flops.
The LVTH374 data inputs include bushold, eliminating the
need for external pull-up resistors to hold unused inputs.
These octal flip-flops are designed for low-voltage (3.3V)
V
CC
applications, but with the capability to provide a TTL
interface to a 5V environment. The LVT374 and LVTH374
are fabricated with an advanced BiCMOS technology to
achieve high speed operation similar to 5V ABT while
maintaining low power dissipation.
Features
s
Input and output interface capability to systems at
5V V
CC
s
Bus-Hold data inputs eliminate the need for external
pull-up resistors to hold unused inputs (74LVTH374),
also available without bushold feature (74LVT374).
s
Live insertion/extraction permitted
s
Power Up/Down high impedance provides glitch-free
bus loading
s
Outputs source/sink

32 mA/

64 mA
s
Functionally compatible with the 74 series 374
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human-body model
!
2000V
Machine model
!
200V
Charged-device model
!
1000V
Ordering Code:
Order Number
74LVT374WM
74LVT374SJ
74LVT374MTC
74LVTH374WM
74LVTH374SJ
74LVTH374MTC
74LVTH374MTCX_NL
(Note 1)
Package
Number
M20B
M20D
MTC20
M20B
M20D
MTC20
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
Pb-Free 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Pb-Free package per JEDEC J-STD-020B.
Note 1:
鈥淿NL鈥?indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Logic Symbols
IEEE/IEC
漏 2005 Fairchild Semiconductor Corporation
DS012016
www.fairchildsemi.com

74LVTH374MTC 產(chǎn)品屬性

  • 73

  • 集成電路 (IC)

  • 邏輯 - 觸發(fā)器

  • 74LVTH

  • 標(biāo)準(zhǔn)

  • D 型總線

  • 三態(tài)非反相

  • 1

  • 8

  • 160MHz

  • 4.8ns

  • 正邊沿

  • 32mA，64mA

  • 2.7 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 20-TSSOP（0.173"，4.40mm 寬）

  • 管件

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