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74LVTH322374ZKER Datasheet

  • 74LVTH322374ZKER

  • 3.3V ABT 32 BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3 STATE...

  • 266.36KB

  • 9頁

  • TI

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SN74LVTH322374
3.3 V ABT 32 BIT EDGE TRIGGERED D TYPE FLIP FLOP
WITH 3 STATE OUTPUTS
SCBS754B 鈭?MARCH 2002 鈭?REVISED SEPTEMBER 2003
D
Member of the Texas Instruments
D
D
D
D
D
Widebus+
錚?/div>
Family
Output Ports Have Equivalent 22-鈩?Series
Resistors, So No External Resistors Are
Required
Supports Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V
CC
)
Supports Unregulated Battery Operation
Down to 2.7 V
Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25擄C
I
off
and Power-Up 3-State Support Hot
Insertion
GKE OR ZKE PACKAGE
(TOP VIEW)
1
2
3
4
5
6
D
Bus Hold on Data Inputs Eliminates the
D
D
D
D
Need for External Pullup/Pulldown
Resistors
Distributed V
CC
and GND Pins Minimize
High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds JESD 22
鈭?2000-V Human-Body Model (A114-A)
鈭?200-V Machine Model (A115-A)
terminal assignments
1
2
1Q1
1Q3
1Q5
1Q7
2Q1
2Q3
2Q5
2Q8
3Q1
3Q3
3Q5
3Q7
4Q1
4Q3
4Q5
4Q8
3
1OE
GND
VCC
GND
GND
VCC
GND
2OE
3OE
GND
VCC
GND
GND
VCC
GND
4OE
4
1CLK
GND
VCC
GND
GND
VCC
GND
2CLK
3CLK
GND
VCC
GND
GND
VCC
GND
4CLK
5
1D1
1D3
1D5
1D7
2D1
2D3
2D5
2D8
3D1
3D3
3D5
3D7
4D1
4D3
4D5
4D8
6
1D2
1D4
1D6
1D8
2D2
2D4
2D6
2D7
3D2
3D4
3D6
3D8
4D2
4D4
4D6
4D7
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
1Q2
1Q4
1Q6
1Q8
2Q2
2Q4
2Q6
2Q7
3Q2
3Q4
3Q6
3Q8
4Q2
4Q4
4Q6
4Q7
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
NC 鈭?No internal connection
description/ordering information
ORDERING INFORMATION
TA
鈭?0擄C to 85擄C
PACKAGE鈥?/div>
LFBGA 鈭?GKE
LFBGA 鈭?ZKE (Pb-free)
Tape and reel
ORDERABLE
PART NUMBER
SN74LVTH322374KR
74LVTH322374ZKER
HW374
TOP-SIDE
MARKING
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+ is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
錚?/div>
2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
1

74LVTH322374ZKER 產(chǎn)品屬性

  • 1,000

  • 集成電路 (IC)

  • 邏輯 - 觸發(fā)器

  • 74LVTH

  • 標(biāo)準(zhǔn)

  • D 型總線

  • 三態(tài)非反相

  • 4

  • 8

  • 160MHz

  • 3.4ns

  • 正邊沿

  • 12mA，12mA

  • 2.7 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 96-LFBGA

  • 帶卷 (TR)

74LVTH322374ZKER相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [P...
  • 英文版
    Quad 2-input NOR gate
    Philips
  • 英文版
    Quad 2-input NAND gate
    Philips
  • 英文版
    Hex inverter
    Philips
  • 英文版
    Quad 2-input AND gate
    Philips
  • 英文版
    Triple 3-input NAND gate
    Philips
  • 英文版
    Triple 3-input AND gate
    Philips
  • 英文版
    Hex inverting Schmitt-trigger
    Philips
  • 英文版
    Dual 4-input NAND gate
    Philips
  • 英文版
    Triple 3-input NOR gate
    Philips
  • 英文版
    Quad 2-input OR gate
    Philips
  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS
  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS [NXP Se...
  • 英文版
    Quad 2-input EXCLUSIVE-OR gate
    Philips
  • 英文版
    QUADRUPLE 2 INPUT POSITIVE NAND GATES
    TI [Texas ...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...

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