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74LVTH16373DGGRG4 Datasheet

  • 74LVTH16373DGGRG4

  • 3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUT...

  • 16頁(yè)

  • TI

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SN54LVTH16373, SN74LVTH16373
3.3-V ABT 16-BIT TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
www.ti.com
SCBS144O 鈥?MAY 1992 鈥?REVISED OCTOBER 2005
FEATURES
鈥?/div>
鈥?/div>
Members of the Texas Instruments Widebus鈩?/div>
Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V Operation
and Low Static-Power Dissipation
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V
CC
)
Support Unregulated Battery Operation Down
to 2.7 V
Typical V
OLP
(Output Ground Bounce) <0.8 V
at V
CC
= 3.3 V, T
A
= 25擄C
I
off
and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Distributed V
CC
and GND Pins Minimize
High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds JESD 22
鈥?2000-V Human-Body Model (A114-A)
鈥?200-V Machine Model (A115-A)
SN54LVTH16373 . . . WD PACKAGE
SN74LVTH16373 . . . DGG OR DL PACKAGE
(TOP VIEW)
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
1OE
1Q1
1Q2
GND
1Q3
1Q4
V
CC
1Q5
1Q6
GND
1Q7
1Q8
2Q1
2Q2
GND
2Q3
2Q4
V
CC
2Q5
2Q6
GND
2Q7
2Q8
2OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1LE
1D1
1D2
GND
1D3
1D4
V
CC
1D5
1D6
GND
1D7
1D8
2D1
2D2
GND
2D3
2D4
V
CC
2D5
2D6
GND
2D7
2D8
2LE
DESCRIPTION/ORDERING INFORMATION
The 'LVTH16373 devices are 16-bit transparent D-type latches with 3-state outputs designed for low-voltage
(3.3-V) V
CC
operation, but with the capability to provide a TTL interface to a 5-V system environment. These
devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working
registers.
ORDERING INFORMATION
T
A
FBGA 鈥?GRD
FBGA 鈥?ZRD (Pb-free)
鈥?0擄C to 85擄C
SSOP 鈥?DL
TSSOP 鈥?DGG
VFBGA 鈥?GQL
VFBGA 鈥?ZQL (Pb-free)
鈥?5擄C to 125擄C
CFP 鈥?WD
PACKAGE
(1)
Tape and reel
Tube
Tape and reel
Tape and reel
Tape and reel
Tube
ORDERABLE PART NUMBER
SN74LVTH16373GRDR
SN74LVTH16373ZRDR
SN74LVTH16373DL
SN74LVTH16373DLR
SN74LVTH16373DGGR
SN74LVTH16373GQLR
SN74LVTH16373ZQLR
SNJ54LVTH16373WD
TOP-SIDE MARKING
LL373
LVTH16373
LVTH16373
LL373
SNJ54LVTH16373WD
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 漏 1992鈥?005, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.

74LVTH16373DGGRG4 產(chǎn)品屬性

  • 2,000

  • 集成電路 (IC)

  • 邏輯 - 鎖銷

  • 74LVTH

  • D 型透明鎖存器

  • 8:8

  • 三態(tài)

  • 2.7 V ~ 3.6 V

  • 2

  • 2.1ns

  • 32mA，64mA

  • -40°C ~ 85°C

  • 表面貼裝

  • 48-TFSOP（0.240"，6.10mm 寬）

  • 48-TSSOP

  • 帶卷 (TR)

74LVTH16373DGGRG4相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
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  • 英文版
    Quad 2-input NAND gate
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    Quad 2-input NAND gate
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    Quad 2-input NOR gate
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    Quad 2-input NAND gate
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    Hex inverter
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    Quad 2-input AND gate
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    Triple 3-input NAND gate
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    Triple 3-input AND gate
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    Hex inverting Schmitt-trigger
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    Dual 4-input NAND gate
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    Triple 3-input NOR gate
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  • 英文版
    Quad 2-input OR gate
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  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
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  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS [NXP Se...
  • 英文版
    Quad 2-input EXCLUSIVE-OR gate
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  • 英文版
    QUADRUPLE 2 INPUT POSITIVE NAND GATES
    TI [Texas ...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...

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