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74LVTH16244ADLRG4 Datasheet

  • 74LVTH16244ADLRG4

  • 3.3-V ABT 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

  • 19頁

  • TI

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SN54LVTH16244A, SN74LVTH16244A
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
www.ti.com
SCBS142Q 鈥?MAY 1992 鈥?REVISED OCTOBER 2005
FEATURES
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Members of the Texas Instruments
Widebus 鈩?Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V
CC
)
Support Unregulated Battery Operation
Down to 2.7 V
Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25擄C
I
off
and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 500 mA
Per JESD 17
ESD Protection Exceeds JESD 22
鈥?2000-V Human-Body Model (A114-A)
鈥?200-V Machine Model (A115-A)
SN54LVTH16244A . . . WD PACKAGE
SN74LVTH16244A . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
1OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
DESCRIPTION/ORDERING INFORMATION
The 'LVTH16244A devices are 16-bit buffers and line drivers designed for low-voltage (3.3-V) V
CC
operation, but
with the capability to provide a TTL interface to a 5-V system environment. These devices can be used as four
4-bit buffers, two 8-bit buffers, or one 16-bit buffer. These devices provide true outputs and symmetrical
active-low output-enable (OE) inputs.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
When V
CC
is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
CC
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 漏 1992鈥?005, Texas Instruments Incorporated

74LVTH16244ADLRG4 產(chǎn)品屬性

  • 1,000

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器

  • 74LVTH

  • 緩沖器/線路驅(qū)動器，非反相

  • 4

  • 4

  • 32mA，64mA

  • 2.7 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 48-BSSOP（0.295"，7.50mm 寬）

  • 48-SSOP

  • 帶卷 (TR)

74LVTH16244ADLRG4相關(guān)型號PDF文件下載

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