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74LVT162374DL Datasheet

  • 74LVT162374DL

  • 3.3V LVT 16-bit edge-triggered D-type flip-flop with 30 ohm ...

  • 17頁(yè)

  • PHILIPS

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74LVT162374
3.3 V 16-bit edge-triggered D-type 鏗俰p-鏗俹p with 30
鈩?/div>
termination resistors; 3-state
Rev. 03 鈥?17 January 2005
Product data sheet
1. General description
The 74LVT162374 is a high performance BiCMOS product designed for V
CC
operation at
3.3 V.
The 74LVT162374 is designed with 30
鈩?/div>
series resistance in both the HIGH and LOW
states of the output. This design reduces line noise in applications such as memory
address drivers, clock drivers, and bus receivers/transmitters.
This device is a 16-bit edge-triggered D-type 鏗俰p-鏗俹p featuring non-inverting 3-state
outputs. The device can be used as two 8-bit 鏗俰p-鏗俹ps or one 16-bit 鏗俰p-鏗俹p. On the
positive transition of the clock (CP), the Q outputs of the 鏗俰p-鏗俹p take on the logic levels
set up at the D inputs.
2. Features
s
s
s
s
s
s
s
s
s
s
s
s
s
16-bit edge-triggered 鏗俰p-鏗俹p
3-state buffers
Output capability: +12 mA and
鈭?2
mA
TTL input and output switching levels
Input and output interface capability to systems at 5 V supply
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused
inputs
Live insertion and extraction permitted
Outputs include series resistance of 30
鈩?/div>
making external resistors unnecessary
Power-up reset
Power-up 3-state
No bus current loading when output is tied to 5 V bus
Latch-up protection exceeds 500 mA per JESD78
ESD protection:
x
MIL STD 883 method 3015: exceeds 2000 V
x
Machine model: exceeds 200 V

74LVT162374DL 產(chǎn)品屬性

  • NXP

  • 觸發(fā)器

  • 2

  • LVT

  • D-Type Edge Triggered Flip-Flop

  • Non-Inverting

  • Single-Ended

  • 3 ns at 3.3 V

  • - 12 mA

  • 3.6 V

  • + 85 C

  • SMD/SMT

  • SOT-370

  • Tube

  • - 40 C

  • 8

  • 8

  • 31

  • 2.7 V

  • 74LVT162374DL,112

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