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74LVQ541 Datasheet

  • 74LVQ541

  • OCTAL BUS BUFFER WITH 3 STATE OUTPUTS (NO INVERTED)

  • 272.80KB

  • 12頁

  • STMICROELECTRONICS   STMICROELECTRONICS

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74LVQ541
OCTAL BUS BUFFER
WITH 3 STATE OUTPUTS (NON INVERTED)
s
s
s
s
s
s
s
s
s
s
s
HIGH SPEED:
t
PD
=5.8 ns (TYP.) at V
CC
= 3.3 V
COMPATIBLE WITH TTL OUTPUTS
LOW POWER DISSIPATION:
I
CC
= 4
碌A(chǔ)
(MAX.) at T
A
=25擄C
LOW NOISE:
V
OLP
= 0.4V (TYP.) at V
CC
= 3.3V
75鈩?TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 12mA (MIN) at V
CC
= 3.0 V
PCI BUS LEVELS GUARANTEED AT 24 mA
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 541
IMPROVED LATCH-UP IMMUNITY
SOP
TSSOP
Table 1: Order Codes
PACKAGE
SOP
TSSOP
T&R
74LVQ541MTR
74LVQ541TTR
DESCRIPTION
The 74LVQ541 is a low voltage CMOS OCTAL
BUS BUFFER with 3 STATE OUTPUTS NON
INVERTED fabricated with sub-micron silicon
gate and double-layer metal wiring C
2
MOS
technology. It is ideal for low power and low noise
3.3V applications.
The 3-STATE control gate operates as two input
and such that if either G1 and G2 are high, all
eight outputs are in the high impedance state. In
order to enhance PC board layout, the 74AC541
offers a pinout having inputs and outputs on
opposite side of the package.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
Figure 1: Pin Connection And IEC Logic Symbols
July 2004
Rev. 2
1/12

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