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74LVQ4066MTR Datasheet

  • 74LVQ4066MTR

  • Interface IC

  • 72.29KB

  • 9頁

  • ETC

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74LVQ4066
QUAD BILATERAL SWITCH
s
s
s
s
s
s
s
HIGH SPEED:
t
PD
= 0.4 ns (TYP.) at V
CC
= 3.3 V
t
PD
= 0.1 ns (TYP.) at V
CC
= 5 V
LOW POWER DISSIPATION:
I
CC
= 2碌A(chǔ) (MAX.) at T
A
=25擄C
LOW 鈥漁N 鈥?LOW RESISTANCE
R
ON
= 14鈩?at V
CC
= 3.3V , I
I/O
<
1 mA
R
ON
= 12鈩?at V
CC
= 5.0V , I
I/O
<
1 mA
SINE WAVE DISTORTION :
0.04% at V
CC
= 3.3V , f = 1KHz
OPERATING VOLTAGE RANGE:
V
CC(OPR)
= 2V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 4066
IMPROVED LATCH-UP IMMUNITY
SOP
TSSOP
ORDER CODES
PACKAGE
SOP
TSSOP
TUBE
74LVQ4066M
T&R
74LVQ4066MTR
74LVQ4066TTR
DESCRIPTION
The 74LVQ4066 is a low voltage CMOS QUAD
BILATERAL SWITCH fabricated with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
technology.
It is ideal for low power and low noise 3.3V
applications and each switch is designed to
handle both analog and digital signals.
The switches permit signals with amplitudes up to
Vcc (peak) to be transmitted in either direction
without relevant propagation delay and without
generating additional ground bounce noise.
It has an ON-Resistance which is greatly reduced
in comparison with 74HC4066.
It is provided of four individual enable inputs to
control the switches; the switch is ON when the C
input is held high and OFF (High Impedance)
when C is held low.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them ESD immunity and transient excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
January 2002
1/9

74LVQ4066MTR 產(chǎn)品屬性

  • 2,500

  • 集成電路 (IC)

  • 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器

  • 74LVQ

  • 雙向 FET 開關(guān)

  • 1 x 1:1

  • 4

  • 1mA，1mA

  • 單電源

  • 2 V ~ 5.5 V

  • -55°C ~ 125°C

  • 表面貼裝

  • 14-SOIC（0.154"，3.90mm 寬）

  • 14-SO

  • 帶卷 (TR)

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