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74LVCH322244AZKER Datasheet

  • 74LVCH322244AZKER

  • 32-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS

  • 11頁

  • TI

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SN74LVCH322244A
32-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES405B 鈥?JULY 2002 鈥?REVISED APRIL 2005
FEATURES
鈥?/div>
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Member of the Texas Instruments Widebus+鈩?/div>
Family
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max t
pd
of 4.4 ns at 3.3 V
Output Ports Have Equivalent 26-鈩?Series
Resistors, So No External Resistors Are
Required
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25擄C
Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25擄C
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
I
off
Supports Partial-Power-Down Mode
Operation
Supports Mixed-Mode Signal Operation
On All Ports (5-V Input/Output Voltage With
3.3-V V
CC
)
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
ESD Protection Exceeds JESD 22
鈥?2000-V Human-Body Model (A114-A)
鈥?200-V Machine Model (A115-A)
鈥?1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This 32-bit buffer/driver is designed for 1.65-V to 3.6-V V
CC
operation.
The SN74LVCH322244A is designed specifically to improve the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters.
The device can be used as eight 4-bit buffers, four 8-bit buffers, two 16-bit buffers, or one 32-bit buffer. It
provides true outputs and symmetrical active-low output-enable (OE) inputs.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
The outputs, which are designed to sink up to 12 mA, include equivalent 26-鈩?resistors to reduce overshoot and
undershoot.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
T
A
鈥?0擄C to 85擄C
(1)
LFBGA 鈥?GKE
LFBGA 鈥?ZKE (Pb-free)
PACKAGE
(1)
Tape and reel
ORDERABLE PART NUMBER
SN74LVCH322244AKR
74LVCH322244AZKER
TOP-SIDE MARKING
CG244A
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
(EACH 4-BIT BUFFER)
INPUTS
OE
L
L
H
A
H
L
X
OUTPUT
Y
H
L
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+ is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 漏 2002鈥?005, Texas Instruments Incorporated

74LVCH322244AZKER 產(chǎn)品屬性

  • 1

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器

  • 74LVCH

  • 緩沖器/線路驅(qū)動(dòng)器，非反相

  • 8

  • 4

  • 12mA，12mA

  • 1.2 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 96-LFBGA

  • 96-PBGA MICROSTAR（13.6x5.6）

  • Digi-Reel®

  • 296-23196-6

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