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74LVC3GU04DCURE4 Datasheet

  • 74LVC3GU04DCURE4

  • TRIPLE INVERTER GATE

  • 11頁

  • TI

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SN74LVC3GU04
TRIPLE INVERTER GATE
www.ti.com
SCES539A 鈥?JANUARY 2004 鈥?REVISED APRIL 2005
FEATURES
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Available in the Texas Instruments
NanoStar鈩?and NanoFree鈩?Packages
Supports 5-V V
CC
Operation
Inputs Accept Voltages to 5.5 V
Max t
pd
of 3.9 ns at 3.3 V
Low Power Consumption, 10-碌A(chǔ) Max I
CC
鹵24-mA Output Drive at 3.3 V
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25擄C
Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25擄C
Unbuffered Outputs
Latch-Up Performance Exceeds 100 mA
Per JESD 78, Class II
ESD Protection Exceeds JESD 22
鈥?2000-V Human-Body Model (A114-A)
鈥?200-V Machine Model (A115-A)
鈥?1000-V Charged-Device Model (C101)
DCT OR DCU PACKAGE
(TOP VIEW)
1A
3Y
2A
GND
1
2
3
4
8
7
6
5
V
CC
1Y
3A
2Y
YEP OR YZP PACKAGE
(BOTTOM VIEW)
GND
2A
3Y
1A
4 5
3 6
2 7
1 8
2Y
3A
1Y
V
CC
DESCRIPTION/ORDERING INFORMATION
This triple inverter is designed for 1.65-V to 5.5-V V
CC
operation.
The SN74LVC3GU04 contains three inverters with unbuffered outputs and performs the Boolean function Y = A.
NanoStar鈩?and NanoFree鈩?package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
T
A
PACKAGE
(1)
NanoStar鈩?鈥?WCSP (DSBGA)
0.23-mm Large Bump 鈥?YEP
鈥?0擄C to 85擄C
NanoFree鈩?鈥?WCSP (DSBGA)
0.23-mm Large Bump 鈥?YZP (Pb-free)
SSOP 鈥?DCT
VSSOP 鈥?DCU
(1)
(2)
ORDERABLE PART NUMBER
SN74LVC3GU04YEPR
Reel of 3000
SN74LVC3GU04YZPR
Reel of 3000
Reel of 3000
Reel of 250
SN74LVC3GU04DCTR
SN74LVC3GU04DCUR
SN74LVC3GU04DCUT
CU4_ _ _
CU4_
_ _ _CD_
TOP-SIDE MARKING
(2)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
鈰?/div>
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 漏 2004鈥?005, Texas Instruments Incorporated

74LVC3GU04DCURE4 產(chǎn)品屬性

  • 3,000

  • 集成電路 (IC)

  • 邏輯 - 柵極和逆變器

  • 74LVC

  • 反相器

  • 3

  • 1

  • -

  • 1.65 V ~ 5.5 V

  • 10µA

  • 32mA，32mA

  • -

  • -

  • 3.2ns @ 5V，50pF

  • -40°C ~ 85°C

  • 表面貼裝

  • US8

  • 8-VFSOP（0.091"，2.30mm 寬）

  • 帶卷 (TR)

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