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74LVC3G14DP Datasheet

  • 74LVC3G14DP

  • Triple inverting Schmitt trigger with 5 V tolerant input

  • 17頁

  • PHILIPS

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74LVC3G14
Triple inverting Schmitt trigger with 5 V tolerant input
Rev. 03 鈥?31 January 2005
Product data sheet
1. General description
The 74LVC3G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device
and superior to most advanced CMOS compatible TTL-families.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device as translator in a mixed 3.3 V and 5 V environment.
This device is fully speci鏗乪d for partial power-down applications using I
off
. The I
off
circuitry
disables the output, preventing the damaging back鏗俹w current through the device when it
is powered down.
The 74LVC3G14 provides three inverting buffers with Schmitt-trigger action. It is capable
of transforming slowly changing input signals into sharply de鏗乶ed, jitter-free output
signals.
2. Features
s
s
s
s
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant input/output for interfacing with 5 V logic
High noise immunity
ESD protection:
x
HBM EIA/JESD22-A114-B exceeds 2000 V
x
MM EIA/JESD22-A115-A exceeds 200 V.
鹵24
mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Multiple package options
Speci鏗乪d from
鈭?0 擄C
to +85
擄C
and
鈭?0 擄C
to +125
擄C.
s
s
s
s
s
s
3. Applications
s
Wave and pulse shaper for highly noisy environment
s
Astable multivibrator
s
Monostable multivibrator.

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