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74LV374A Datasheet

  • 74LV374A

  • OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

  • 20頁

  • TI

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SN54LV374A, SN74LV374A
OCTAL EDGE TRIGGERED D TYPE FLIP FLOPS
WITH 3 STATE OUTPUTS
SCLS408H 鈭?APRIL 1998 鈭?REVISED APRIL 2005
D
2-V to 5.5-V V
CC
Operation
D
Max t
pd
of 9.5 ns at 5 V
D
Typical V
OLP
(Output Ground Bounce)
D
D
<0.8 V at V
CC
= 3.3 V, T
A
= 25擄C
Typical V
OHV
(Output V
OH
Undershoot)
>2.3 V at V
CC
= 3.3 V, T
A
= 25擄C
Support Mixed-Mode Voltage Operation on
All Ports
D
I
off
Supports Partial-Power-Down Mode
D
D
Operation
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
鈭?2000-V Human-Body Model (A114-A)
鈭?200-V Machine Model (A115-A)
鈭?1000-V Charged-Device Model (C101)
SN54LV374A . . . FK PACKAGE
(TOP VIEW)
V
CC
OE
SN54LV374A . . . J OR W PACKAGE
SN74LV374A . . . DB, DGV, DW, NS,
OR PW PACKAGE
(TOP VIEW)
SN74LV374A . . . RGY PACKAGE
(TOP VIEW)
1D
1Q
OE
V
CC
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
CLK
1
20
19
8Q
18
8D
17
7D
16
7Q
15
6Q
14
6D
13
5D
12
5Q
1Q
1D
2D
2Q
3Q
3D
4D
4Q
2
3
4
5
6
7
8
9
10
11
2D
2Q
3Q
3D
4D
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
8Q
8D
7D
7Q
6Q
6D
description/ordering information
The 鈥橪V374A devices are octal edge-triggered D-type flip-flops designed for 2-V to 5.5-V V
CC
operation.
ORDERING INFORMATION
TA
PACKAGE鈥?/div>
QFN 鈭?RGY
SOIC 鈭?DW
SOP 鈭?NS
SSOP 鈭?DB
鈭?0擄C to 85擄C
TSSOP 鈭?PW
TVSOP 鈭?DGV
VFBGA 鈭?GQN
CDIP 鈭?J
鈭?5 C 125擄C
鈭?5擄C to 125 C
CFP 鈭?W
LCCC 鈭?FK
Reel of 1000
Tube of 25
Reel of 2000
Reel of 2000
Reel of 2000
Tube of 70
Reel of 2000
Reel of 250
Reel of 2000
Reel of 1000
Tube of 20
Tube of 85
Tube of 55
ORDERABLE
PART NUMBER
SN74LV374ARGYR
SN74LV374ADW
SN74LV374ADWR
SN74LV374ANSR
SN74LV374ADBR
SN74LV374APW
SN74LV374APWR
SN74LV374APWT
SN74LV374ADGVR
SN74LV374AGQNR
SNJ54LV374AJ
SNJ54LV374AW
SNJ54LV374AFK
LV374A
74LV374A
LV374A
LV374A
LV374A
LV374A
LV374A
LV374A
SNJ54LV374AJ
SNJ54LV374AW
SNJ54LV374AFK
TOP-SIDE
MARKING
LV374A
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
GND
CLK
Copyright
錚?/div>
2005, Texas Instruments Incorporated
鈥?/div>
DALLAS, TEXAS 75265
4Q
GND
CLK
5Q
5D
1

74LV374A相關(guān)型號(hào)PDF文件下載

  • 型號(hào)
    版本
    描述
    廠商
    下載
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [P...
  • 英文版
    Quad 2-input NOR gate
    Philips
  • 英文版
    Quad 2-input NAND gate
    Philips
  • 英文版
    Hex inverter
    Philips
  • 英文版
    Quad 2-input AND gate
    Philips
  • 英文版
    Triple 3-input NAND gate
    Philips
  • 英文版
    Triple 3-input AND gate
    Philips
  • 英文版
    Hex inverting Schmitt-trigger
    Philips
  • 英文版
    Dual 4-input NAND gate
    Philips
  • 英文版
    Triple 3-input NOR gate
    Philips
  • 英文版
    Quad 2-input OR gate
    Philips
  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS
  • 英文版
    Dual D-type flip-flop with set and reset; positive-edge trig...
    PHILIPS [NXP Se...
  • 英文版
    Quad 2-input EXCLUSIVE-OR gate
    Philips
  • 英文版
    QUADRUPLE 2 INPUT POSITIVE NAND GATES
    TI [Texas ...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...
  • 英文版
    Quad 2-input NAND gate
    PHILIPS
  • 英文版
    Quad 2-input NAND gate
    PHILIPS [N...

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