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74LS573 Datasheet

  • 74LS573

  • Octal D-Type Latch with 3-STATE Outputs

  • 5頁

  • FAIRCHILD

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DM74LS573 Octal D-Type Latch with 3-STATE Outputs
October 1988
Revised March 2000
DM74LS573
Octal D-Type Latch with 3-STATE Outputs
General Description
The DM74LS573 is a high speed octal latch with buffered
common Latch Enable (LE) and buffered common Output
Enable (OE) inputs.
This device is functionally identical to the DM74LS373, but
has different pinouts.
Features
s
Inputs and outputs on opposite sides of package allow-
ing easy interface with microprocessors
s
Useful as input or output port for microprocessors
s
Functionally identical to DM74LS373
s
Input clamp diodes limit high speed termination effects
s
Fully TTL and CMOS compatible
Ordering Code:
Order Number
DM74LS573WM
DM74LS573N
Package Number
M20B
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Connection Diagram
V
CC
=
Pin 20
GND
=
Pin 10
Pin Descriptions
Pin Names
D0鈥揇7
LE
OE
O0鈥揙7
Data Inputs
Latch Enable Input (Active HIGH)
3-STATE Output Enable Input (Active LOW)
3-STATE Latch Outputs
Description
Function Tables
Output
Enable
L
L
L
H
Latch
Enable
H
H
L
X
D
H
L
X
X
Output
O
H
L
Q
O
Z
L
=
LOW State
H
=
HIGH State
X
=
Don't Care
Z
=
High Impedance State
Q
O
=
Previous Condition of O
漏 2000 Fairchild Semiconductor Corporation
DS009814
www.fairchildsemi.com

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