DM74LS253 3-STATE Data Selector/Multiplexer
August 1986
Revised March 2000
DM74LS253
3-STATE Data Selector/Multiplexer
General Description
Each of these Schottky-clamped data selectors/multiplex-
ers contains inverters and drivers to supply fully comple-
mentary, on-chip, binary decoding data selection to the
AND-OR gates. Separate output control inputs are pro-
vided for each of the two four-line sections.
The 3-STATE outputs can interface directly with data lines
of bus-organized systems. With all but one of the common
outputs disabled (at a high impedance state), the low
impedance of the single enabled output will drive the bus
line to a HIGH or LOW logic level.
Features
s
3-STATE version of DM74LS153 with same pinout
s
Schottky-diode-clamped transistors
s
Permit multiplexing from N-lines to one line
s
Performs parallel-to-serial conversion
s
Strobe/output control
s
High fanout totem-pole outputs
s
Typical propagation delay
Data to output
Select to output
12 ns
21 ns
s
Typical power dissipation 35 mW
Ordering Code:
Order Number
DM74LS253M
DM74LS253N
Package Number
M16A
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Function Table
Select
Inputs
B
X
L
L
L
L
H
H
H
H
A
X
L
L
H
H
L
L
H
H
C0
X
L
H
X
X
X
X
X
X
C1
X
X
X
L
H
X
X
X
X
C2
X
X
X
X
X
L
H
X
X
C3
X
X
X
X
X
X
X
L
H
Data Inputs
Output
Control
G
H
L
L
L
L
L
L
L
L
Y
Z
L
H
L
H
L
H
L
H
Output
Address Inputs A and B are common to both sections.
H
=
HIGH Level
L
=
LOW Level
X
=
Don't Care
Z
=
High Impedance (OFF)
漏 2000 Fairchild Semiconductor Corporation
DS006416
www.fairchildsemi.com
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