DUAL 4-INPUT MULTIPLEXER
The LSTTL / MSI SN54 / 74LS153 is a very high speed Dual 4-Input
Multiplexer with common select inputs and individual enable inputs for each
section. It can select two bits of data from four sources. The two buffered
outputs present data in the true (non-inverted) form. In addition to multiplexer
operation, the LS153 can generate any two functions of three variables. The
LS153 is fabricated with the Schottky barrier diode process for high speed and
is completely compatible with all Motorola TTL families.
SN54/74LS153
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DUAL 4-INPUT MULTIPLEXER
LOW POWER SCHOTTKY
Multifunction Capability
Non-Inverting Outputs
Separate Enable for Each Multiplexer
Input Clamp Diodes Limit High Speed Termination Effects
CONNECTION DIAGRAM DIP
(TOP VIEW)
VCC
16
Eb
15
S0
14
I3b
13
I2b
12
I1b
11
I0b
10
Zb
9
NOTE:
The Flatpak version
has the same pinouts
(Connection Diagram) as
the Dual In-Line Package.
16
J SUFFIX
CERAMIC
CASE 620-09
1
1
Ea
2
S1
3
I3a
4
I2a
5
I1a
6
I0a
7
Za
8
GND
16
1
N SUFFIX
PLASTIC
CASE 648-08
PIN NAMES
S0
E
I0, I1
Z
Common Select Input
Enable (Active LOW) Input
Multiplexer Inputs
Multiplexer Output (Note b)
LOADING
(Note a)
HIGH
0.5 U.L.
0.5 U.L.
0.5 U.L.
10 U.L.
LOW
0.25 U.L.
0.25 U.L.
0.25 U.L.
5 (2.5) U.L.
16
1
D SUFFIX
SOIC
CASE 751B-03
NOTES:
a) 1 TTL Unit Load (U.L.) = 40
碌A
HIGH/1.6 mA LOW.
b) The Output LOW drive factor is 2.5 U.L. for Military (54) and 5 U.L. for Commercial (74)
Temperature Ranges.
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
LOGIC DIAGRAM
Ea I0a
1
6
5
I1a
4
I2a
3
I3a
2
S1
14
S0
10
I0b
11
I1b
12
I2b
13
I3b Eb
15
LOGIC SYMBOL
1
6
5
4
3
10 11 12 13
15
14
2
Ea I0a I1a I2a I3a
S0
Sa
Za
7
I0b I1b I2b I3b Eb
Zb
9
7
Za
VCC = PIN 16
GND = PIN 8
= PIN NUMBERS
VCC = PIN 16
GND = PIN 8
9
Zb
FAST AND LS TTL DATA
5-257
1
2
3
4
5
