Package Options Include 鈥淪mall Outline鈥?/div>
Packages, Ceramic Chip Carriers, and
Standard and Ceramic 300-mil DIPs
SN54LS07 . . . J PACKAGE
SN74LS07, SN74LS17 . . . D OR N PACKAGE
(T0P VIEW)
1A
1Y
2A
2Y
3A
3Y
GND
1
2
3
4
5
6
7
14
13
12
11
10
9
8
V
CC
6A
6Y
5A
5Y
4A
4Y
description
These monolithic hex buffers/drivers feature
high-voltage open-collector outputs to interface
with high-level circuits or for driving high-current
loads. They are also characterized for use as
buffers for driving TTL inputs. The
鈥睱S07
has a
rated output voltage of 30 V and the
鈥睱S17
has a
rated output voltage of 15 V. The maximum sink
current is 30 mA for the SN54LS07 and 40 mA for
the SN74LS07 and SN74LS17.
These circuits are compatible with most TTL
families. Inputs are diode-clamped to minimize
transmission-line effects, which simplifies design.
Typical power dissipation is 140 mW and average
propagation delay time is 12 ns.
SN54LS07 . . . FK PACKAGE
(T0P VIEW)
2A
NC
2Y
NC
3A
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
1Y
1A
NC
V
CC
6A
6Y
NC
5A
NC
5Y
NC 鈥?No internal connection
The SN54LS07 is characterized over the full military temperature range of 鈥?5擄C to 125擄C. The SN74LS07 and
SN74LS17 are characterized for operation from 0擄C to 70擄C.
logic symbol
鈥?/div>
1A 1
2A 3
3A 5
4A 9
5A 11
6A 13
2 1Y
4 2Y
6 3Y
8 4Y
10 5Y
12 6Y
logic diagram (positive logic)
1A
1
2
1Y
2A
3
3Y
GND
NC
4Y
4A
4
2Y
3A
5
6
3Y
鈥?This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for D, J, and N packages.
4A
9
8
4Y
5A
11
10
5Y
6A
13
12
6Y
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright
漏
1991, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
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