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74LCXZ245WM Datasheet

  • 74LCXZ245WM

  • Low Voltage Bidirectional Transceiver with 5V Tolerant Input...

  • 10頁

  • FAIRCHILD

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74LCXZ245 Low Voltage Bidirectional Transceiver with 5V Tolerant Inputs and Outputs
October 2000
Revised October 2000
74LCXZ245
Low Voltage Bidirectional Transceiver
with 5V Tolerant Inputs and Outputs
General Description
The 74LCXZ245 contains eight non-inverting bidirectional
buffers with 3-STATE outputs and is intended for bus ori-
ented applications. The device is designed for low voltage
(2.5V and 3.3V) V
CC
applications with capability of interfac-
ing to a 5V signal environment. The T/R input determines
the direction of data flow through the device. The OE input
disables both the A and B ports by placing them in a high
impedance state.
The 74LCXZ245 is fabricated with an advanced CMOS
technology to achieve high speed operation while maintain-
ing CMOS low power dissipation. When V
CC
is between 0V
and 1.5V, the 74LCXZ245 is on the high impedance state
during power up or power down. This places the outputs in
the high impedance (Z) state preventing intermittent low
impedance loading or glitching in bus oriented applications.
Features
s
5V tolerant inputs and outputs
s
2.3V鈥?.6V V
CC
specifications provided
s
7.0 ns t
PD
max (V
CC
=
3.3V), 10
碌
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
鹵
24 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCXZ245WM
74LCXZ245SJ
74LCXZ245MSA
74LCXZ245MTC
Package Number
M20B
M20D
MSA20
MTC20
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names
OE
T/R
A
0
鈥揂
7
B
0
鈥揃
7
Description
Output Enable Input
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
漏 2000 Fairchild Semiconductor Corporation
DS500362
www.fairchildsemi.com

74LCXZ245WM 產(chǎn)品屬性

  • 36

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器

  • 74LCXZ

  • 收發(fā)器，非反相

  • 1

  • 8

  • 24mA，24mA

  • 2.7 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 20-SOIC（0.295"，7.50mm 寬）

  • 20-SOIC

  • 管件

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