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74LCX646MSA Datasheet

  • 74LCX646MSA

  • Low Voltage Octal Transceiver/Register with 5V Tolerant Inpu...

  • 107.74KB

  • 10頁

  • FAIRCHILD

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74LCX646 Low Voltage Octal Transceiver/Register with 5V Tolerant Inputs and Outputs
February 1994
Revised March 2001
74LCX646
Low Voltage Octal Transceiver/Register
with 5V Tolerant Inputs and Outputs
General Description
The LCX646 consists of registered bus transceiver circuits,
D-type flip-flops, and control circuitry providing multiplexed
transmission of data directly from the input bus or from the
internal storage registers. Data on the A or B bus will be
loaded into the respective registers on the LOW-to-HIGH
transition of the appropriate pin (CPAB or CPBA) (see
Functional Description).
The LCX646 is designed for low voltage (2.5V or 3.3V) V
CC
applications with capability of interfacing to a 5V signal
environment.
The LCX646 is fabricated with an advanced CMOS tech-
nology to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V
鈭?/div>
3.6V V
CC
specifications provided
s
7.0 ns t
PD
max (V
CC
=
3.3V), 10
碌
A I
CC
max
s
Power down high impedance inputs and outputs
s
Supports live insertion/withdrawal (Note 1)
s
鹵
24 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Note 1:
To ensure the high-impedance state during power up or down, OE
should be tied to V
CC
through a pull-up resistor: the minimum value or the
resistor is determined by the current-sourcing capability of the driver.
Ordering Code:
Order Number
74LCX646WM
74LCX646MSA
74LCX646MTC
Package Number
M24B
MSA24
MTC24
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
A
0
鈥揂
7
Description
Data Register A Inputs
Data Register A Outputs
B
0
鈥揃
7
Data Register B Inputs
Data Register B Outputs
CPAB, CPBA
SAB, SBA
OE
DIR
Clock Pulse Inputs
Transmit/Receive Inputs
Output Enable Input
Direction Control Input
漏 2001 Fairchild Semiconductor Corporation
DS011997
www.fairchildsemi.com

74LCX646MSA 產(chǎn)品屬性

  • 58

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動(dòng)器，接收器，收發(fā)器

  • 74LCX

  • 寄存收發(fā)器，非反相

  • 1

  • 8

  • 24mA，24mA

  • 2 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 24-SSOP（0.209"，5.30mm 寬）

  • 24-SSOP

  • 管件

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