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t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.5V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16541
IMPROVED LATCH-UP IMMUNITY
ESD PERFORMANCE:
HBM>2000V(MIL STD 883 method 3015);
MM>200V
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
T&R
74LCX16541TTR
PIN CONNECTION
DESCRIPTION
The 74LCX16541 is an advanced high-speed
CMOS 16-BIT BUS BUFFER (3-STATE) fabricat-
ed with sub-micron silicon gate and double-layer
metal wiring C
2
MOS tecnology.
This is composed of two 8-bit sections with
separate output-enable signals. For either 8-bit
buffers section, the 3 STATE control gate
operates as a two input AND such that if either
nG1 and nG2 are high, all outputs are in the high
impedence state. This device is designed to be
used with 3 state memory address driveres, etc.
It hase same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power con-
sumption.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
February 2003
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