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t
PHL
26鈩?SERIE RESISTORS IN OUTPUTS
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 162541
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
T&R
74LCX162541TTR
PIN CONNECTION
DESCRIPTION
The 74LCX162541 is a low voltage CMOS 16 BIT
BUS BUFFER (NON-INVERTED) fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low power
and high speed 3.3V applications; it can be
interfaced to 5V signal environment for both inputs
and outputs.
This is composed of two 8-bit sections with sepa-
rate output-enable signals. For either 8-bit buffers
section, the 3 STATE control gate operates as a
two input AND such that if either nG1 and nG2 are
high, all outputs are in the high impedence state.
This device is designed to be used with 3 state
memory address drivers, etc.
The device circuits is including 26鈩?series resis-
tance in the outputs. These resistors permit to re-
duce line noise in high speed applications.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
February 2003
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