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t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.0V to 3.6V (1.5V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 139
LATCH-UP PERFORMANCE EXCEEDS 500mA
ESD PERFORMANCE:
HBM >2000V; MM > 200V
M1
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74LCX139M
74LCX139T
environment for inputs.
The active low enable input can be used for
gating or as a data input for demultiplexing
applications. While the enable input is held high,
all four outputs are high independently of the
other inputs.
It has same speed performanece at 3.3V than 5V
AC/ACT family, conbined with a lower power
consumptinon.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The 74LCX139 is a low voltage CMOS DUAL 2
TO 4 LINE DECODER/ DEMULTIPLEXER
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
It is ideal for low power and high speed 3.3V
applications; it can be inerfaced to 5V signal
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2000
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