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74LCX138MTCX Datasheet

  • 74LCX138MTCX

  • 3-To-8-Line Demultiplexer

  • 9頁

  • ETC

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74LCX138 Low Voltage 1-of-8 Decoder/Demultiplexer with 5V Tolerant Inputs
March 1995
Revised February 2001
74LCX138
Low Voltage 1-of-8 Decoder/Demultiplexer
with 5V Tolerant Inputs
General Description
The LCX138 is a high-speed 1-of-8 decoder/demultiplexer.
This device is ideally suited for high-speed memory chip
select address decoding. The multiple input enables allow
parallel expansion to a 1-of-24 decoder using just three
LCX138 devices or a 1-of-32 decoder using four LCX138
devices and one inverter.
The 74LCX138 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs
s
2.3V鈥?.6V V
CC
specifications provided
s
6.0 ns t
PD
max (V
CC
=
3.3V), 10
碌
A I
CC
max
s
Power down high impedance inputs and outputs
s
鹵
24 mA output drive (V
CC
=
3.0V)
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds 500 mA
s
ESD performance:
Human body model
>
2000V
Machine model
>
200V
Ordering Code:
Order Number
74LCX138M
74LCX138SJ
74LCX138MTC
Package Number
M16A
M16D
MTC16
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
A
0
鈥揂
2
E
1
鈥揈
2
E
3
O
0
鈥揙
7
Description
Address Inputs
Enable Inputs
Enable Input
Outputs
漏 2001 Fairchild Semiconductor Corporation
DS012417
www.fairchildsemi.com

74LCX138MTCX 產(chǎn)品屬性

  • 2,500

  • 集成電路 (IC)

  • 邏輯 - 信號(hào)開關(guān)，多路復(fù)用器，解碼器

  • 74LCX

  • 解碼器/多路分解器

  • 1 x 3:8

  • 1

  • 24mA，24mA

  • 單電源

  • 2 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 16-TSSOP（0.173"，4.40mm 寬）

  • 16-TSSOP

  • 帶卷 (TR)

  • 74LCX138MTCXTR

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