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74LCX11MTCX_NL Datasheet

  • 74LCX11MTCX_NL

  • Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs

  • 529.53KB

  • 11頁

  • FAIRCHILD

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74LCX11 Low Voltage Triple 3-Input AND Gate with 5V Tolerant Inputs
April 1995
Revised July 2005
74LCX11
Low Voltage Triple 3-Input AND Gate
with 5V Tolerant Inputs
General Description
The LCX11 is a triple 3-input AND gate with buffered out-
puts. LCX devices are designed for low voltage (2.5V or
3.3V) operation with the added capability of interfacing to a
5V signal environment.
The 74LCX11 is fabricated with advanced CMOS technol-
ogy to achieve high speed operation while maintaining
CMOS low power dissipation.
Features
s
5V tolerant inputs and outputs
s
2.3V鈥?.6V V
CC
specifications provided
s
6.0ns t
PD
max (V
CC
3.3V), 10
P
A I
CC
max
3.0V)
s
Power down high impedance inputs and outputs
s
r
24 mA output drive (V
CC
s
Implements patented noise/EMI reduction circuitry
s
Latch-up performance exceeds JEDEC 78 conditions
s
ESD performance:
Human body model
!
2000V
Machine model
!
200V
s
Leadless DQFN Package
Ordering Code:
Order Number
74LCX11M
74LCX11MX_NL
(Note 1)
74LCX11SJ
74LCX11BQX
(Note 2)
74LCX11MTC
74LCX11MTCX_NL
(Note 1)
Package
Number
M14A
M14A
M14D
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
MLP014A Pb-Free 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads (DQFN), JEDEC
MO-241, 2.5 x 3.0mm
MTC14
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
Pb-Free package per JEDEC J-STD-020B.
Note 1:
鈥淿NL鈥?indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.
Note 2:
DQFN package available in Tape and Reel only.
漏 2005 Fairchild Semiconductor Corporation
DS012426
www.fairchildsemi.com

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