SN54HCT573, SN74HCT573
OCTAL TRANSPARENT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SCLS176E 鈥?MARCH 1984 鈥?REVISED JULY 2003
D
D
D
D
D
D
D
D
Operating Voltage Range of 4.5 V to 5.5 V
High-Current 3-State Outputs Drive Bus
Lines Directly or Up To 15 LSTTL Loads
Low Power Consumption, 80-碌A Max I
CC
Typical t
pd
= 21 ns
鹵6-mA
Output Drive at 5 V
Low Input Current of 1
碌A
Max
Inputs Are TTL-Voltage Compatible
Bus-Structured Pinout
SN54HCT573 . . . J OR W PACKAGE
SN74HCT573 . . . DB, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
description/ordering information
These octal transparent D-type latches feature
3-state outputs designed specifically for driving
highly capacitive or relatively low-impedance
loads. The 鈥橦CT573 devices are particularly
suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working
registers.
While the latch-enable (LE) input is high, the
Q outputs respond to the data (D) inputs. When
LE is low, the outputs are latched to retain the data
that was set up at the D inputs.
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
LE
SN54HCT573 . . . FK PACKAGE
(TOP VIEW)
3D
4D
5D
6D
7D
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
OE
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
TOP-SIDE
MARKING
A buffered output-enable (OE) input can be used
to place the eight outputs in either a normal logic
state (high or low logic levels) or the
high-impedance state. In the high-impedance
state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased
drive provide the capability to drive bus lines without interface or pullup components.
ORDERING INFORMATION
TA
PDIP 鈥?N
SOIC 鈥?DW
鈥?0擄C to 85擄C
SOP 鈥?NS
SSOP 鈥?DB
TSSOP 鈥?PW
CDIP 鈥?J
鈥?5擄C to 125擄C
CFP 鈥?W
PACKAGE鈥?/div>
Tube
Tube
Tape and reel
Tape and reel
Tape and reel
Tube
Tape and reel
Tube
Tube
ORDERABLE
PART NUMBER
SN74HCT573N
SN74HCT573DW
SN74HCT573DWR
SN74HCT573NSR
SN74HCT573DBR
SN74HCT573PW
SN74HCT573PWR
SNJ54HCT573J
SNJ54HCT573W
LCCC 鈥?FK
Tube
SNJ54HCT573FK
SNJ54HCT573FK
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
錚?/div>
2003, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
8D
GND
LE
8Q
7Q
HCT573
HCT573
HT573
HT573
2D
1D
SN74HCT573N
SNJ54HCT573J
SNJ54HCT573W
1
1
2
3
4
5
6
7
8
9
10
11
