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74GTL1655 Datasheet

  • 74GTL1655

  • 16-BIT LVTTL-TO-GTL/GTL UNIVERSAL BUS TRANSCEIVERS WITH LIVE...

  • 16頁

  • TI

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SN54GTL1655, SN74GTL1655
16-BIT LVTTL-TO-GTL/GTL+ UNIVERSAL BUS TRANSCEIVERS
WITH LIVE INSERTION
SCBS696E 鈥?JULY 1997 鈥?REVISED NOVEMBER 1999
D
D
D
D
D
D
D
D
D
Members of the Texas Instruments
Widebus
鈩?/div>
Family
UBT
鈩?/div>
(Universal Bus Transceiver)
Combines D-Type Latches and D-Type
Flip-Flops for Operation in Transparent,
Latched, or Clocked Mode
Translate Between GTL/GTL+ Signal Level
and LVTTL Logic Levels
High-Drive (100 mA),
Low-Output-Impedance (12
鈩?
Bus
Transceiver (B Port)
Edge-Rate-Control Input Configures the
B-Port Output Rise and Fall Times
I
off
, Power-Up 3-State, and BIAS V
CC
Support Live Insertion
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors on A Port
Distributed V
CC
and GND-Pin Configuration
Minimizes High-Speed Switching Noise
Package Options Include Thin Shrink
Small-Outline (DGG) and Ceramic Quad
Flat (HV) Packages
SN74GTL1655 . . . DGG PACKAGE
(TOP VIEW)
description
The 鈥橤TL1655 devices are high-drive (100 mA),
low-output-impedance (12
鈩?
16-bit universal bus
transceivers (UBT) that provide LVTTL-to-
GTL/GTL+ and GTL/GTL+-to-LVTTL signal-level
translation. They are partitioned as two 8-bit
transceivers and combine D-type flip-flops and
D-type latches to allow for transparent, latched,
and clocked modes of data transfer similar to the
鈥?6501 function. These devices provide an
interface between cards operating at LVTTL logic
levels and a backplane operating at GTL/GTL+
signal levels. Higher-speed operation is a direct
result of the reduced output swing (<1 V), reduced
input threshold levels and output edge control
(OEC鈩?. The high drive is suitable for driving
double-terminated low-impedance backplanes
using incident-wave switching.
1OEAB
1OEBA
V
CC
1A1
GND
1A2
1A3
GND
1A4
GND
1A5
GND
1A6
1A7
V
CC
1A8
2A1
GND
2A2
2A3
GND
2A4
2A5
GND
2A6
GND
2A7
V
CC
2A8
GND
2OEAB
2OEBA
1
2
3
4
5
6
7
8
9
10
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12
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14
15
16
17
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64
63
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33
CLK
1LEAB
1LEBA
V
ERC
GND
1B1
1B2
GND
1B3
1B4
1B5
GND
1B6
1B7
V
CC
1B8
2B1
GND
2B2
2B3
GND
2B4
2B5
V
REF
2B6
GND
2B7
2B8
BIAS V
CC
2LEAB
2LEBA
OE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, UBT, and OEC are trademarks of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
Copyright
漏
1999, Texas Instruments Incorporated
鈥?/div>
DALLAS, TEXAS 75265
1

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