1CY74FCT162827T
Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modi鏗乪d to remove devices not offered.
CY74FCT16827T
CY74FCT162827T
SCCS064 - August 1994 - Revised March 2000
20-Bit Buffers/Line Drivers
CY74FCT162827T Features:
鈥?Balanced 24 mA output drivers
鈥?Reduced system switching noise
鈥?Typical V
OLP
(ground bounce) <0.6V at V
CC
= 5V,
T
A
= 25藲C
Features
鈥?FCT-E speed at 3.2 ns
鈥?Power-off disable outputs permits live insertion
鈥?Edge-rate control circuitry for signi鏗乧antly improved
noise characteristics
鈥?Typical output skew < 250 ps
鈥?ESD > 2000V
鈥?TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)
packages
鈥?Industrial temperature range of
鈭?0藲C
to +85藲C
鈥?V
CC
= 5V
鹵
10%
Functional Description
The CY74FCT16827T 20-bit buffer/line driver and the
CY74FCT162827T
20-bit
buffer/line
driver
provide
high-performance bus interface buffering for wide data/address
paths or buses carrying parity. These parts can be used as a single
20-bit buffer or two 10-bit buffers. Each 10-bit buffer has a pair of
NANDed OE for increased flexibility. The outputs are designed with
a power-off disable feature to allow for live insertion of boards.
The CY74FCT16827T is ideally suited for driving
high-capacitance loads and low-impedance backplanes.
The CY74FCT162827T has 24-mA balanced output drivers
with current-limiting resistors in the outputs. This reduces the
need for external terminating resistors and provides for
minimal undershoot and reduced ground bounce. The
CY74FCT162827T is ideal for driving transmission lines.
CY74FCT16827T Features:
鈥?64 mA sink current, 32 mA source current
鈥?Typical V
OLP
(ground bounce) <1.0V at V
CC
= 5V,
T
A
= 25藲C
Logic Block Diagrams
Pin Configuration
SSOP/TSSOP
Top View
1
OE
1
1
OE
2
1
OE
1
1
Y
1
1
Y
2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
OE
2
1
A
1
1
A
2
GND
1
Y
3
1
A
1
1
Y
1
1
Y
4
GND
1
A
3
1
A
4
V
CC
1
Y
5
1
Y
6
1
Y
7
V
CC
1
A
5
1
A
6
1
A
7
TO 9 OTHER CHANNELS
FCT16827-1
GND
1
Y
8
1
Y
9
1
Y
10
GND
1
A
8
1
A
9
1
A
10
2
A
1
2
A
2
2
A
3
2
OE
1
2
OE
2
2
Y
1
2
Y
2
2
Y
3
GND
2
Y
4
2
Y
5
2
A
1
2
Y
1
2
Y
6
GND
2
A
4
2
A
5
2
A
6
V
CC
2
Y
7
2
Y
8
V
CC
2
A
7
2
A
8
GND
TO 9 OTHER CHANNELS
FCT16827-2
2
Y
9
2
Y
10
2
OE
1
GND
2
A
9
2
A
10
2
OE
2
FCT16827-3
Copyright
漏
2000, Texas Instruments Incorporated