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74F573SCX Datasheet

  • 74F573SCX

  • Octal D-Type Latch with TRI-STATE Outputs

  • 168.99KB

  • 8頁(yè)

  • NSC

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54F 74F573 Octal D-Type Latch with TRI-STATE Outputs
August 1995
54F 74F573
Octal D-Type Latch with TRI-STATE Outputs
General Description
The 鈥橣573 is a high speed octal latch with buffered common
Latch Enable (LE) and buffered common Output Enable
(OE) inputs
This device is functionally identical to the 鈥橣373 but has
different pinouts
Features
Y
Y
Y
Y
Y
Inputs and outputs on opposite sides of package
allowing easy interface with microprocessors
Useful as input or output port for microprocessors
Functionally identical to 鈥橣373
TRI-STATE outputs for bus interfacing
Guaranteed 4000V minimum ESD protection
Commercial
74F573PC
Military
Package
Number
N20A
Package Description
20-Lead (0 300 Wide) Molded Dual-In-Line
20-Lead Ceramic Dual-In-Line
20-Lead (0 300 Wide) Molded Small Outline JEDEC
20-Lead (0 300 Wide) Molded Small Outline EIAJ
20-Lead Cerpak
20-Lead Ceramic Leadless Chip Carrier Type C
54F573DM (Note 2)
74F573SC (Note 1)
74F573SJ (Note 1)
54F573FM (Note 2)
54F573LM (Note 2)
J20A
M20B
M20D
W20A
E20A
Note 1
Devices also available in 13 reel Use suffix
e
SCX and SJX
Note 2
Military grade device with environmental and burn-in processing Use suffix
e
DMQB FMQB and LMQB
Logic Symbols
Connection Diagrams
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9566鈥?
IEEE IEC
TL F 9566 鈥?3
TL F 9566 鈥?2
TL F 9566鈥?
TRI-STATE is a registered trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 9566
RRD-B30M115 Printed in U S A

74F573SCX 產(chǎn)品屬性

  • 1,000

  • 集成電路 (IC)

  • 邏輯 - 鎖銷(xiāo)

  • 74F

  • D 型透明鎖存器

  • 8:8

  • 三態(tài)

  • 4.5 V ~ 5.5 V

  • 1

  • 5.3ns

  • 3mA，24mA

  • 0°C ~ 70°C

  • 表面貼裝

  • 20-SOIC（0.295"，7.50mm 寬）

  • 20-SOIC

  • 帶卷 (TR)

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