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74F541SJX Datasheet

  • 74F541SJX

  • 8-Bit Non-Inverting Buffer/Driver

  • 70.42KB

  • 7頁

  • ETC

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74F540 鈥?74F541 Octal Buffer/Line Driver with 3-STATE Outputs
April 1988
Revised October 2000
74F540 鈥?74F541
Octal Buffer/Line Driver with 3-STATE Outputs
General Description
The 74F540 and 74F541 are similar in function to the
74F240 and 74F244 respectively, except that the inputs
and outputs are on opposite sides of the package (see
Connection Diagrams). This pinout arrangement makes
these devices especially useful as output ports for micro-
processors, allowing ease of layout and greater PC board
density.
Features
s
3-STATE outputs drive bus lines
s
Inputs and outputs opposite side of package, allowing
easier interface to microprocessors
Ordering Code:
Order Number
74F540SC
74F540SJ
74F540PC
74F541SC
74F541SJ
74F541PC
Package Number
M20B
M20D
N20A
M20B
M20D
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbols
IEEE/IEC
74F540
Connection Diagrams
74F540
IEEE/IEC
74F541
74F541
漏 2000 Fairchild Semiconductor Corporation
DS009553
www.fairchildsemi.com

74F541SJX 產(chǎn)品屬性

  • 2,000

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器

  • 74F

  • 緩沖器/線路驅(qū)動器，非反相

  • 1

  • 8

  • 3mA，64mA

  • 4.5 V ~ 5.5 V

  • 0°C ~ 70°C

  • 表面貼裝

  • 20-SOIC（0.209"，5.30mm 寬）

  • 20-SOIC

  • 帶卷 (TR)

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