74F30 8-Input NAND Gate
April 1988
Revised August 1999
74F30
8-Input NAND Gate
General Description
This device contains a single gate, which performs the
logic NAND function.
Ordering Code:
Order Number
74F30SC
74F30SJ
74F30PC
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the letter 鈥淴鈥?to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Unit Loading/Fan Out
U.L.
Pin Names Description
A
0
鈥揂
7
O
Inputs
Output
1.0/1.0
50/33.3
Input I
IH
/I
IL
HIGH/LOW Output I
OH
/I
OL
20
碌A(chǔ)/鈭?.6
mA
鈭?
mA/20 mA
Function Table
Inputs
A
0
L
X
X
X
X
X
X
X
H
A
1
X
L
X
X
X
X
X
X
H
A
2
X
X
L
X
X
X
X
X
H
A
3
X
X
X
L
X
X
X
X
H
A
4
X
X
X
X
L
X
X
X
H
A
5
X
X
X
X
X
L
X
X
H
A
6
X
X
X
X
X
X
L
X
H
A
7
X
X
X
X
X
X
X
L
H
Output
O
H
H
H
H
H
H
H
H
L
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
漏 1999 Fairchild Semiconductor Corporation
DS009560
www.fairchildsemi.com