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74F192PC Datasheet

  • 74F192PC

  • Up/Down Decade Counter with Separate Up/Down Clocks

  • 195.57KB

  • 10頁

  • NSC

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54F 74F192 Up Down Decade Counter with Separate Up Down Clocks
November 1994
54F 74F192
Up Down Decade Counter
with Separate Up Down Clocks
General Description
The 鈥橣192 is an up down BCD decade (8421) counter Sep-
arate Count Up and Count Down Clocks are used and in
either counting mode the circuits operate synchronously
The outputs change state synchronously with the LOW-to-
HIGH transitions on the clock inputs
Separate Terminal Count Up and Terminal Count Down out-
puts are used as the clocks for a subsequent stage without
extra logic thus simplifying multistage counter designs Indi-
vidual preset inputs allow the circuit to be used as a pro-
grammable counter Both the Parallel Load (PL) and the
Master Reset (MR) inputs asynchronously override the
clocks
Features
Y
Guaranteed 4000V minimum ESD protection
Commercial
74F192PC
Military
Package
Number
N16E
Package Description
16-Lead (0 300 Wide) Molded Dual-In-Line
16-Lead Ceramic Dual-In-Line
16-Lead (0 150 Wide) Molded Small Outline JEDEC
16-Lead (0 300 Wide) Molded Small Outline EIAJ
16-Lead Cerpack
20-Lead Ceramic Leadless Chip Carrier Type C
54F192DM (Note 2)
74F192SC (Note 1)
74F192SJ (Note 1)
54F192FM (Note 2)
54F192LM (Note 2)
J16A
M16A
M16D
W16A
E20A
Note 1
Devices also available in 13 reel Use suffix
e
SCX and SJX
Note 2
Military grade device with environmental and burn-in processing Use suffix
e
DMQB FMQB and LMQB
Logic Symbols
Connection Diagrams
Pin Assignment for
DIP SOIC and Flatpak
Pin Assignment
for LCC
TL F 9496鈥?
IEEE IEC
TL F 9496 鈥?1
TL F 9496 鈥?2
TL F 9496鈥?
TRI-STATE is a registered trademark of National Semiconductor Corporation
C
1995 National Semiconductor Corporation
TL F 9496
RRD-B30M75 Printed in U S A

74F192PC 產(chǎn)品屬性

  • Fairchild Semiconductor

  • DIP-16

  • Through Hole

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