74F14 Hex Inverter Schmitt Trigger
March 1988
Revised July 1999
74F14
Hex Inverter Schmitt Trigger
General Description
The 74F14 contains six logic inverters which accept stan-
dard TTL input signals and provide standard TTL output
levels. They are capable of transforming slowly changing
input signals into sharply defined, jitter-free output signals.
In addition, they have a greater noise margin than conven-
tional inverters.
Each circuit contains a Schmitt trigger followed by a Dar-
lington level shifter and a phase splitter driving a TTL
totem-pole output. The Schmitt trigger uses positive feed
back to effectively speed-up slow input transition, and pro-
vide different input threshold voltages for positive and neg-
ative-going transitions. This hysteresis between the
positive-going and negative-going input thresholds (typi-
cally 800 mV) is determined internally by resistor ratios and
is essentially insensitive to temperature and supply voltage
variations.
Ordering Code:
Order Number
74F14SC
74F14SJ
74F14PC
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Unit Loading/Fan Out
U.L.
Pin Names Description
I
n
O
n
Input
Output
1.0/1.0
50/33.3
Input I
IH
/I
IL
Function Table
Input
A
L
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
Output
O
H
L
HIGH/LOW Output I
OH
/I
OL
20
碌A/鈭?.6
mA
鈭?
mA/20 mA
漏 1999 Fairchild Semiconductor Corporation
DS009461
www.fairchildsemi.com
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