74F148 8-Line to 3-Line Priority Encoder
April 1988
Revised September 2000
74F148
8-Line to 3-Line Priority Encoder
General Description
The F148 provides three bits of binary coded output repre-
senting the position of the highest order active input, along
with an output indicating the presence of any active input. It
is easily expanded via input and output enables to provide
priority encoding over many bits.
Features
s
Encodes eight data lines in priority
s
Provides 3-bit binary priority code
s
Input enable capability
s
Signals when data is present on any input
s
Cascadable for priority encoding of n bits
Ordering Code:
Order Number
74F148SC
74F148SJ
74F148PC
Package Number
M16A
M16D
N16E
Package Description
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter 鈥淴鈥?to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Truth Table
Inputs
EI
H
L
L
L
L
L
L
L
L
L
I
0
X
H
X
X
X
X
X
X
X
L
I
1
X
H
X
X
X
X
X
X
L
H
I
2
X
H
X
X
X
X
X
L
H
H
I
3
X
H
X
X
X
X
L
H
H
H
I
4
X
H
X
X
X
L
H
H
H
H
I
5
X
H
X
X
L
H
H
H
H
H
I
6
X
H
X
L
H
H
H
H
H
H
Outputs
I
7
GS A
0
A
1
A
2
EO
X
H
L
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
H
L
H
L
H
L
H
L
H
H
H
L
L
H
H
L
L
H
H
H
H
L
L
L
L
H
H
H
H
H
L
H
H
H
H
H
H
H
H
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
漏 2000 Fairchild Semiconductor Corporation
DS009480
www.fairchildsemi.com