SN74CBTLV1G125
LOW VOLTAGE SINGLE FET BUS SWITCH
SCDS057G 鈭?MARCH 1998 鈭?REVISED OCTOBER 2003
D
5-鈩?Switch Connection Between Two Ports
D
Rail-to-Rail Switching on Data I/O Ports
D
I
off
Supports Partial-Power-Down Mode
Operation
DBV OR DCK PACKAGE
(TOP VIEW)
description/ordering information
The SN74CBTLV1G125 features a single
high-speed line switch. The switch is disabled
when the output-enable (OE) input is high.
OE
A
GND
1
2
3
5
4
V
CC
B
This device is fully specified for partial-power-down applications using I
off
. The I
off
feature ensures that
damaging current will not backflow through the device when it is powered down. The device has isolation during
power off.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
鈭?0擄C to 85擄C
PACKAGE鈥?/div>
SOT (SOT-23) 鈭?DBV
SOT (SC-70) 鈭?DCK
Tape and reel
Tape and reel
ORDERABLE
PART NUMBER
SN74CBTLV1G125DBVR
SN74CBTLV1G125DCKR
TOP-SIDE
MARKING鈥?/div>
V25_
VM_
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
鈥?The actual top-side marking has one additional character that designates the assembly/test site.
FUNCTION TABLE
INPUT
OE
L
H
FUNCTION
A port = B port
Disconnect
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
錚?/div>
2003, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
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