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74CB3Q3305DCURE4 Datasheet

  • 74CB3Q3305DCURE4

  • DUAL FET BUS SWITCH 2.5V/3.3V LOW VOLTAGE HIGH BANDWIDTH BUS...

  • 10頁

  • TI

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www.ti.com
SN74CB3Q3305
DUAL FET BUS SWITCH
2.5-V/3.3-V LOW-VOLTAGE HIGH-BANDWIDTH BUS SWITCH
SCDS141A 鈥?OCTOBER 2003 鈥?REVISED APRIL 2005
FEATURES
鈥?/div>
鈥?/div>
鈥?/div>
High-Bandwidth Data Path (up to 500 MHz
(1)
)
5-V Tolerant I/Os With Device Powered Up or
Powered Down
Low and Flat ON-State Resistance (r
on
)
Characteristics Over Operating Range
(r
on
= 3
鈩?/div>
Typ)
Rail-to-Rail Switching on Data I/O Ports
鈥?0- to 5-V Switching With 3.3-V V
CC
鈥?0- to 3.3-V Switching With 2.5-V V
CC
Bidirectional Data Flow With Near-Zero
Propagation Delay
Low Input/Output Capacitance Minimizes
Loading and Signal Distortion
(C
io(OFF)
= 3.5 pF Typ)
Fast Switching Frequency (f
OE
= 20 MHz Max)
For additional information regarding the performance
characteristics of the CB3Q family, refer to the TI application
report,
CBT-C, CB3T, and CB3Q Signal-Switch Families,
literature number SCDA008.
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
(1)
鈥?/div>
Data and Control Inputs Provide Undershoot
Clamp Diodes
Low Power Consumption (I
CC
= 0.25 mA Typ)
V
CC
Operating Range From 2.3 V to 3.6 V
Data I/Os Support 0- to 5-V Signaling Levels
(0.8 V, 1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V, 5 V)
Control Inputs Can Be Driven by TTL or
5-V/3.3-V CMOS Outputs
I
off
Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
鈥?2000-V Human-Body Model
(A114-B, Class II)
鈥?1000-V Charged-Device Model (C101)
Supports Both Digital and Analog
Applications: USB Interface, Differential
Signal Interface, Bus Isolation, Low-Distortion
Signal Gating
PW PACKAGE
(TOP VIEW)
1OE
1A
1B
GND
1
2
3
4
8
7
6
5
V
CC
2OE
2B
2A
DESCRIPTION/ORDERING INFORMATION
The SN74CB3Q3305 is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of
the pass transistor, providing a low and flat ON-state resistance (r
on
). The low and flat ON-state resistance allows
for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device
also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus.
Specifically designed to support high-bandwidth applications, the SN74CB3Q3305 provides an optimized
interface solution ideally suited for broadband communications, networking, and data-intensive computing
systems.
The SN74CB3Q3305 is organized as two 1-bit switches with separate output-enable (1OE, 2OE) inputs. It can
be used as two 1-bit bus switches or as one 2-bit bus switch. When OE is high, the associated 1-bit bus switch is
ON and the A port is connected to the B port, allowing bidirectional data flow between ports. When OE is low, the
associated 1-bit bus switch is OFF and a high-impedance state exists between the A and B ports.
ORDERING INFORMATION
T
A
鈥?0擄C to 85擄C
(1)
TSSOP 鈥?PW
PACKAGE
(1)
Tube
Tape and reel
ORDERABLE PART NUMBER
SN74CB3Q3305PW
SN74CB3Q3305PWR
TOP-SIDE MARKING
BU305
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 漏 2003鈥?005, Texas Instruments Incorporated

74CB3Q3305DCURE4 產(chǎn)品屬性

  • 3,000

  • 集成電路 (IC)

  • 邏輯 - 信號(hào)開關(guān)，多路復(fù)用器，解碼器

  • 74CB

  • FET 總線開關(guān)

  • 1 x 1:1

  • 2

  • 15mA，30mA

  • 單電源

  • 2.3 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 8-VFSOP（0.091"，2.30mm 寬）

  • US8

  • 帶卷 (TR)

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