Quad 2-Input NOR Gate 鈥?/div>
Hex Inverter
General Description
The MM74C00, MM74C02, and MM74C04 logic gates
employ complementary MOS (CMOS) to achieve wide
power supply operating range, low power consumption,
high noise immunity and symmetric controlled rise and fall
times. With features such as this the 74C logic family is
close to ideal for use in digital systems. Function and pin
out compatibility with series 74 devices minimizes design
time for those designers already familiar with the standard
74 logic family.
All inputs are protected from damage due to static dis-
charge by diode clamps to V
CC
and GND.
Features
s
Wide supply voltage range:
s
Guaranteed noise margin:
s
High noise immunity:
s
Low power consumption:
Fan out of 2 driving 74L
3V to 15V
1V
10 nW/package (typ.)
0.45 V
CC
(typ.)
s
Low power: TTL compatibility:
Ordering Code:
Order Number
MM74C00M
MM74C00N
MM74C02N
MM74C04M
MM74C04N
Package Number
M14A
N14A
M14A
M14A
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150鈥?Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300鈥?Wide
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150鈥?Narrow
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150鈥?Narrow
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300鈥?Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Connection Diagrams
Pin Assignments for DIP and SOIC
MM74C00
MM74C02
Top View
MM74C04
Top View
Top View
漏 1999 Fairchild Semiconductor Corporation
DS005877.prf
www.fairchildsemi.com