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74ALVTH162244VRE4 Datasheet

  • 74ALVTH162244VRE4

  • 2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS

  • 253.43KB

  • 13頁

  • TI

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SN54ALVTH162244, SN74ALVTH162244
2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCES074E 鈥?JUNE 1996 - REVISED JANUARY 1999
D
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State-of-the-Art Advanced BiCMOS
Technology (ABT)
Widebus
鈩?/div>
Design for
2.5-V and 3.3-V Operation and Low Static
Power Dissipation
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 2.3-V to
3.6-V V
CC
)
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25擄C
Power Off Disables Outputs, Permitting
Live Insertion
High-Impedance State During Power Up
and Power Down Prevents Driver Conflict
Uses Bus Hold on Data Inputs in Place of
External Pullup/Pulldown Resistors to
Prevent the Bus From Floating
Output Ports Have Equivalent 30-鈩?Series
Resistors, So No External Resistors Are
Required
Auto3-State Eliminates Bus Current
Loading When Output Exceeds V
CC
+ 0.5 V
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model; and Exceeds 1000 V
Using Charged-Device Model, Robotic
Method
Flow-Through Architecture Facilitates
Printed Circuit Board Layout
Distributed V
CC
and GND Pin Configuration
Minimizes High-Speed Switching Noise
Package Options Include Plastic Shrink
Small-Outline (DL), Thin Shrink
Small-Outline (DGG), Thin Very
Small-Outline (DGV) Packages, and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
SN54ALVTH162244 . . . WD PACKAGE
SN74ALVTH162244 . . . DGG, DGV, OR DL PACKAGE
(TOP VIEW)
1OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
NOTE: For order entry:
The DGG package is abbreviated to G, and
the DGV package is abbreviated to V.
description
The 鈥橝LVTH162244 devices are 16-bit buffers/line drivers designed for low-voltage 2.5-V or 3.3-V V
CC
operation, but with the capability to provide a TTL interface to a 5-V system environment.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments Incorporated.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
Copyright
漏
1999, Texas Instruments Incorporated
鈥?/div>
DALLAS, TEXAS 75265
1

74ALVTH162244VRE4 產(chǎn)品屬性

  • 2,000

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器

  • 74ALVTH

  • 緩沖器/線路驅(qū)動器，非反相

  • 4

  • 4

  • 8mA，12mA

  • 2.3 V ~ 2.7 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 48-TFSOP（0.173"，4.40mm 寬）

  • 48-TVSOP

  • 帶卷 (TR)

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