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74ALVCHR16245LRG4 Datasheet

  • 74ALVCHR16245LRG4

  • 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

  • 13頁

  • TI

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www.ti.com
SN74ALVCHR16245
16-BIT BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
SCES064G 鈥?DECEMBER 1995 鈥?REVISED OCTOBER 2004
FEATURES
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
Member of the Texas Instruments Widebus鈩?/div>
Family
Operates From 1.65 V to 3.6 V
Max t
pd
of 4.2 ns at 3.3 V
鹵12-mA
Output Drive at 3.3 V
All Outputs Have Equivalent 26-鈩?Series
Resistors, So No External Resistors Are
Required
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
DGG OR DL PACKAGE
(TOP VIEW)
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鈥?/div>
DESCRIPTION/ORDERING INFORMATION
This 16-bit (dual-octal) noninverting bus transceiver is
designed for 1.65-V to 3.6-V V
CC
operation.
The
SN74ALVCHR16245
is
designed
for
asynchronous communication between data buses.
The control-function implementation minimizes
external timing requirements.
This device can be used as two 8-bit transceivers or
one 16-bit transceiver. It allows data transmission
from the A bus to the B bus or from the B bus to the
A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE)
input can be used to disable the device so that the
buses are effectively isolated.
1DIR
1B1
1B2
GND
1B3
1B4
V
CC
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
V
CC
2B5
2B6
GND
2B7
2B8
2DIR
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CC
2A5
2A6
GND
2A7
2A8
2OE
All outputs, which are designed to sink up to 12 mA, include equivalent 26-鈩?series resistors to reduce overshoot
and undershoot.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
ORDERING INFORMATION
T
A
SSOP - DL
-40擄C to 85擄C
TSSOP - DGG
VFBGA - GQL
VFBGA - ZQL (Pb-free)
PACKAGE
(1)
Tape and reel
Tape and reel
Tape and reel
ORDERABLE PART NUMBER
SN74ALVCHR16245LR
SN74ALVCHR16245GR
SN74ALVCHR16245KR
74ALVCHR16245ZQLR
TOP-SIDE MARKING
ALVCHR16245
ALVCHR16245
VR245
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 漏 1995鈥?004, Texas Instruments Incorporated

74ALVCHR16245LRG4 產(chǎn)品屬性

  • 1,000

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器

  • 74ALVCHR

  • 收發(fā)器，非反相

  • 2

  • 8

  • 12mA，12mA

  • 1.65 V ~ 3.6 V

  • -40°C ~ 85°C

  • 表面貼裝

  • 48-BSSOP（0.295"，7.50mm 寬）

  • 48-SSOP

  • 帶卷 (TR)

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