74ALVCH16245
Low-Voltage 16-Bit
Transceiver with Bus Hold
1.8/2.5/3.3 V
(3鈥揝tate, Non鈥揑nverting)
The 74ALVCH16245 is an advanced performance, non鈥搃nverting
16鈥揵it transceiver. It is designed for very high鈥搒peed, very low鈥損ower
operation in 1.8 V, 2.5 V or 3.3 V systems.
The 74ALVCH16245 is designed with byte control. It can be
operated as two separate octals, or with the controls tied together, as a
16鈥揵it wide function. The Transmit/Receive (T/Rn) inputs determine
the direction of data flow through the bi鈥揹irectional transceiver.
Transmit (active鈥揌IGH) enables data from A ports to B ports; Receive
(active鈥揕OW) enables data from B to A ports. The Output Enable
inputs (OEn), when HIGH, disable both A and B ports by placing them
in a HIGH Z condition. The data inputs include active bushold
circuitry, eliminating the need for external pull鈥搖p resistors to hold
unused or floating inputs at a valid logic state.
http://onsemi.com
MARKING DIAGRAM
48
48
74ALVCH16245DT
1
AWLYYWW
TSSOP鈥?8
DT SUFFIX
CASE 1201
A
WL
YY
WW
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
鈥?/div>
Designed for Low Voltage Operation: VCC = 1.65 鈥?3.6 V
鈥?/div>
3.6 V Tolerant Inputs and Outputs
鈥?/div>
High Speed Operation: 2.5 ns max for 3.0 to 3.6 V
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
鈥?/div>
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3.0 ns max for 2.3 to 2.7 V
6.0 ns max for 1.65 to 1.95 V
Static Drive:
鹵24
mA Drive at 3.0 V
鹵18
mA Drive at 2.3 V
鹵6
mA Drive at 1.65 V
Supports Live Insertion and Withdrawal
Includes Active Bushold to Hold Unused or Floating Inputs at a Valid
Logic State
IOFF Specification Guarantees High Impedance When VCC = 0 V
鈥?/div>
Near Zero Static Supply Current in All Three Logic States (20
碌A)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds
鹵250
mA @ 125擄C
ESD Performance: Human Body Model >2000 V;
Machine Model >200 V
Second Source to Industry Standard 74ALVCH16245
ORDERING INFORMATION
Device
74ALVCH16245DT
74ALVCH16245DTR
Package
TSSOP
TSSOP
Shipping
39 Units/Rail
2500/Tape & Reel
鈥燭o ensure the outputs activate in the 3鈥搒tate condition, the output enable pins
should be connected to VCC through a pull鈥搖p resistor. The value of the resistor is
determined by the current sinking capability of the output connected to the OE pin.
漏
Semiconductor Components Industries, LLC, 2001
1
November, 2001 鈥?Rev. 0
Publication Order Number:
74ALVCH16245/D
74ALVCH16245DT相關型號PDF文件下載
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