SN54AHCT123A, SN74AHCT123A
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS
SCLS420G 鈥?JUNE 1998 鈥?REVISED APRIL 2003
D
D
D
D
D
D
D
Inputs Are TTL-Voltage Compatible
Schmitt-Trigger Circuitry On A, B, and CLR
Inputs for Slow Input Transition Rates
Edge Triggered From Active-High or
Active-Low Gated Logic Inputs
Retriggerable for Very Long Output Pulses
Overriding Clear Terminates Output Pulse
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
鈥?2000-V Human-Body Model (A114-A)
鈥?200-V Machine Model (A115-A)
鈥?1000-V Charged-Device Model (C101)
SN54AHCT123A . . . J OR W PACKAGE
SN74AHCT123A . . . D, DB, DGV, N, OR PW PACKAGE
(TOP VIEW)
1A
1B
1CLR
1Q
2Q
2C
ext
2R
ext
/C
ext
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
1R
ext
/C
ext
1C
ext
1Q
2Q
2CLR
2B
2A
SN54AHCT123A . . . FK PACKAGE
(TOP VIEW)
These edge-triggered multivibrators feature
output pulse-duration control by three methods. In
the first method, the A input is low, and the B input
goes high. In the second method, the B input is
high, and the A input goes low. In the third method,
the A input is low, the B input is high, and the clear
(CLR) input goes high.
The output pulse duration is programmed by
selecting external resistance and capacitance
values. The external timing capacitor must be
connected between C
ext
and R
ext
/C
ext
(positive)
and an external resistor connected between
R
ext
/C
ext
and V
CC
. To obtain variable pulse
durations, connect an external variable resistance
between R
ext
/C
ext
and V
CC
. The output pulse
duration also can be reduced by taking CLR low.
ORDERING INFORMATION
TA
PDIP 鈥?N
SOIC 鈥?D
鈥?0擄C to 85擄C
40擄C
SSOP 鈥?DB
TSSOP 鈥?PW
TVSOP 鈥?DGV
CDIP 鈥?J
鈥?5擄C to 125擄C
CFP 鈥?W
LCCC 鈥?FK
PACKAGE鈥?/div>
Tube
Tube
Tape and reel
Tape and reel
Tape and reel
Tape and reel
Tube
Tube
Tube
1B
1A
NC
V
CC
1R
ext
/C
ext
1CLR
1Q
NC
2Q
2C
ext
4
5
6
7
8
3 2 1 20 19
18
17
16
15
14
9 10 11 12 13
description/ordering information
1C
ext
1Q
NC
2Q
2CLR
NC 鈥?No internal connection
ORDERABLE
PART NUMBER
SN74AHCT123AN
SN74AHCT123AD
SN74AHCT123ADR
SN74AHCT123ADBR
SN74AHCT123APWR
SN74AHCT123ADGVR
SNJ54AHCT123AJ
SNJ54AHCT123AW
SNJ54AHCT123AFK
鈥?Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright
錚?/div>
2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
2R
ext
/C
ext
GND
NC
2A
2B
TOP-SIDE
MARKING
SN74AHCT123AN
AHCT123A
HB123A
HB123A
HB123A
SNJ54AHCT123AJ
SNJ54AHCT123AW
SNJ54AHCT123AFK
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