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74AHC1G09GW Datasheet

  • 74AHC1G09GW

  • 2-input AND gate with open-drain output

  • 11頁(yè)

  • PHILIPS

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74AHC1G09
2-input AND gate with open-drain output
Rev. 01 鈥?26 September 2005
Product data sheet
1. General description
The 74AHC1G09 is a high-speed Si-gate CMOS device.
The 74AHC1G09 provides the 2-input AND function with open-drain output.
The output of the 74AHC1G09 is an open drain and can be connected to other open-drain
outputs to implement active-LOW, wired-OR or active-HIGH wired-AND functions. For
digital operation this device must have a pull-up resistor to establish a logic HIGH level.
2. Features
s
High noise immunity
s
ESD protection:
x
HBM JESD22-A114-C exceeds 2000 V
x
MM JESD22-A115-A exceeds 200 V
s
Low power dissipation
s
Speci鏗乪d from
鈭?0 擄C
to +85
擄C
and from
鈭?0 擄C
to +125
擄C.
3. Quick reference data
Table 1:
Quick reference data
GND = 0 V; T
amb
= 25
擄
C; t
r
= t
f
鈮?/div>
3.0 ns.
Symbol
t
PZL
, t
PLZ
C
i
C
PD
[1]
Parameter
propagation delay
A and B to Y
input capacitance
power dissipation
capacitance
Conditions
V
CC
= 4.5 V to 5.5 V;
C
L
= 15 pF
C
L
= 50 pF; f
i
= 1 MHz;
V
I
= GND to V
CC
[1]
Min
-
-
-
Typ
3.2
1.5
5
Max
5.5
10
-
Unit
ns
pF
pF
C
PD
is used to determine the dynamic power dissipation (P
D
in
碌W).
P
D
= C
PD
脳
V
CC2
脳
f
i
脳
N + (C
L
脳
V
CC2
脳
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in Volts;
N = number of inputs switching;
(C
L
脳
V
CC2
脳
f
o
) = dissipation due to the output if the combination of the pull up voltage and resistance
results in V
CC
at the output.

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