錚?/div>
output control
and undershoot corrector in addition to a split ground bus
for superior performance.
Features
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed pin-to-pin skew AC performance
s
Inputs and outputs on opposite sides of package allow
easy interface with microprocessors
s
Improved latch-up immunity
s
Outputs source/sink 24 mA
s
TTL compatible inputs
Ordering Code:
Order Number
74ACTQ827SC
74ACTQ827SPC
Package Number
M24B
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbols
Connection Diagram
IEEE/IEC
Pin Descriptions
Pin Names
OE
1
, OE
2
D
0
鈥揇
9
O
0
鈥揙
9
Description
Output Enable
Data Inputs
Data Outputs
FACT錚? Quiet Series錚? FACT Quiet Series錚?and GTO錚?are trademarks of Fairchild Semiconductor Corporation.
漏 2000 Fairchild Semiconductor Corporation
DS010687
www.fairchildsemi.com