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74ACTQ652 Datasheet

  • 74ACTQ652

  • Quiet Series摯瑬敳獩 Transceiver/Register

  • 106.01KB

  • Fairchild

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74ACTQ652 Quiet Series錚?Transceiver/Register
June 1991
Revised November 1999
74ACTQ652
Quiet Series錚?Transceiver/Register
General Description
The ACTQ652 consists of bus transceiver circuits with D-
type flip-flops, and control circuitry arranged for multiplexed
transmission of data directly from the input bus or from
internal registers. Data on the A or B bus will be clocked
into the registers as the appropriate clock pin goes to the
HIGH logic level. Output Enable pins (OEAB, OEBA) are
provided to control the transceiver function.
The ACTQ652 utilizes Fairchild FACT Quiet Series錚?tech-
nology to guarantee quiet output switching and improved
dynamic threshold performance. FACT Quiet Series fea-
tures GTO錚?output control and undershoot corrector in
addition to split ground bus for superior performance.
Features
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed pin-to-pin skew AC performance
s
Independent registers for A and B buses
s
Multiplexed real-time and stored data
s
Outputs source/sink 24 mA
s
TTL-compatible inputs
Ordering Code:
Order Number
74ACTQ652SC
74ACTQ652MTC
74ACTQ652SPC
Package Number
M24B
MTC24
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300鈥?Wide Body
24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300鈥?Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbols
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
0
鈥揂
7
, B
0
鈥揃
7
CPAB, CPBA
SAB, SBA
OEAB, OEBA
Description
A and B Inputs/3-STATE Outputs
Clock Inputs
Select Inputs
Output Enable Inputs
FACT錚? Quiet Series錚? FACT Quiet Series錚?and GTO錚?are trademarks of Fairchild Semiconductor Corporation.
漏 1999 Fairchild Semiconductor Corporation
DS010933
www.fairchildsemi.com

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