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74ACT646 Datasheet

  • 74ACT646

  • Octal Transceiver/Register with 3-STATE Outputs

  • Fairchild

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74AC646 鈥?74ACT646 Octal Transceiver/Register with 3-STATE Outputs
November 1988
Revised December 1998
74AC646 鈥?74ACT646
Octal Transceiver/Register with 3-STATE Outputs
General Description
The AC/ACT646 consist of registered bus transceiver cir-
cuits, with outputs, D-type flip-flops and control circuitry
providing multiplexed transmission of data directly from the
input bus or from the internal storage registers. Data on the
A or B bus will be loaded into the respective registers on
the LOW-to-HIGH transition of the appropriate clock pin
(CPAB or CPBA). The four fundamental data handling
functions available are illustrated in Figure 1, Figure 2, Fig-
ure 3, and Figure 4.
Features
s
Independent registers for A and B buses
s
Multiplexed real-time and stored data transfers
s
3-STATE outputs
s
300 mil dual-in-line package
s
Outputs source/sink 24 mA
s
ACT646 has TTL compatible inputs
Ordering Code:
Order Number
74AC646SC
74AC646SPC
74ACT646SPC
Package Number
M24B
N24C
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300鈥?Wide Body
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300鈥?Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300鈥?Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbols
Connection Diagram
Pin Assignment
for DIP and SOIC
IEEE/IEC
Pin Descriptions
Pin Names
A
0
鈥揂
7
B
0
鈥揃
7
CPAB, CPBA
SAB, SBA
G
DIR
FACT鈩?is a trademark of Fairchild Semiconductor Corporation.
Description
Data Register A Inputs
Data Register A Outputs
Data Register B Inputs
Data Register B Outputs
Clock Pulse Inputs
Transmit/Receive Inputs
Output Enable Input
Direction Control Input
漏 1999 Fairchild Semiconductor Corporation
DS010132.prf
www.fairchildsemi.com

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