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74ACT32SJ Datasheet

  • 74ACT32SJ

  • Quiet Series Quad 2-Input OR Gate

  • 7頁

  • FAIRCHILD

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74ACTQ32 Quiet Series Quad 2-Input OR Gate
March 1993
Revised September 2000
74ACTQ32
Quiet Series Quad 2-Input OR Gate
General Description
The ACTQ320 contains four, 2-input OR gates and utilizes
Fairchild Quiet Series technology to guarantee quiet output
switching and improved dynamic threshold performance.
FACT Quiet Series
錚?/div>
features GTO
錚?/div>
output control and
undershoot corrector in addition to a split ground bus for
superior ACMOS performance.
Features
s
I
CC
reduced by 50%
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Improved latch-up immunity
s
Minimum 4 kV ESD protection
s
TTL-compatible inputs
s
Outputs source/sink 24 mA
Ordering Code:
Order Number
74ACT32SC
74ACT32SJ
74ACT32PC
Package Number
M14A
M14D
N14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150 Narrow
14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Logic Symbol
IEEE/IEC
Connection Diagram
Pin Descriptions
Pin Names
A
n
, B
n
O
n
Descriptions
Inputs
Outputs
FACT錚? FACT Quiet Series錚? and GTO錚?are trademarks of Fairchild Semiconductor Corporation.
漏 2000 Fairchild Semiconductor Corporation
DS010893
www.fairchildsemi.com

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