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74ACT2708PC Datasheet

  • 74ACT2708PC

  • 64 x 9 First-In, First-Out Memory

  • 97.32KB

  • 13頁(yè)

  • FAIRCHILD

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74ACT2708 64 x 9 First-In, First-Out Memory
February 1989
Revised January 1999
74ACT2708
64 x 9 First-In, First-Out Memory
General Description
The ACT2708 is an expandable first-in, first-out memory
organized as 64 words by 9 bits. An 85 MHz shift-in and 60
MHz shift-out typical data rate makes it ideal for high-speed
applications. It uses a dual port RAM architecture with
pointer logic to achieve the high speed with negligible fall-
through time.
Separate Shift-In (SI) and Shift-Out (SO) clocks control the
use of synchronous or asynchronous write or read. Other
controls include a Master Reset (MR) and Output Enable
(OE) for initializing the internal registers and allowing the
data outputs to be 3-STATE. Input Ready (IR) and Output
Ready (OR) signal when the FIFO is ready for I/O opera-
tions. The status flags HF and FULL indicate when the
FIFO is full, empty or half full.
The FIFO can be expanded to provide different word
lengths by tying off unused data inputs.
Features
s
64-words by 9-bit dual port RAM organization
s
85 MHz shift-in, 60 MHz shift-out data rate, typical
s
Expandable in word width only
s
TTL-compatible inputs
s
Asynchronous or synchronous operation
s
Asynchronous master reset
s
Outputs source/sink 8 mA
s
3-STATE outputs
s
Full ESD protection
s
Input and output pins directly in line for easy board lay-
out
s
TRW 1030 work-alike operation
Applications
鈥?High-speed disk or tape controllers
鈥?A/D output buffers
鈥?High-speed graphics pixel buffer
鈥?Video time base correction
鈥?Digital filtering
Ordering Code:
Order Number
74ACT2708PC
Package Number
N28B
Package Description
28-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.600鈥?Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Pin Assignment for DIP
Pin Descriptions
Pin Names
D
0
鈥揇
8
MR
OE
SI
SO
IR
OR
HF
FULL
O
0
鈥揙
8
Description
Data Inputs
Master Reset
Output Enable Input
Shift-In
Shift-Out
Input Ready
Output Ready
Half Full Flag
Full Flag
Data Outputs
FACT鈩?is a trademark of Fairchild Semiconductor Corporation.
漏 1999 Fairchild Semiconductor Corporation
DS010144.prf
www.fairchildsemi.com

74ACT2708PC 產(chǎn)品屬性

  • 13

  • 集成電路 (IC)

  • 邏輯 - FIFO

  • 74ACT

  • 異步，同步

  • 576（9 x 64）

  • 60MHz

  • -

  • 4.5 V ~ 5.5 V

  • -40°C ~ 85°C

  • 通孔

  • 28-DIP（0.600"，15.24mm）

  • 28-DIP

  • 管件

  • 74ACT2708

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