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74ACT257TTR Datasheet

  • 74ACT257TTR

  • 2-Input Digital Multiplexer

  • 11頁

  • ETC

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74ACT257
QUAD 2 CHANNEL MULTIPLEXER (3-STATE)
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 5 ns (TYP.) at V
CC
= 5V
LOW POWER DISSIPATION:
I
CC
= 4
碌A(chǔ)(MAX.)
at T
A
=25擄C
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN.), V
IL
= 0.8V (MAX.)
50鈩?TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 257
IMPROVED LATCH-UP IMMUNITY
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
74ACT257B
74ACT257M
T&R
74ACT257MTR
74ACT257TTR
DESCRIPTION
The 74ACT257 is an advanced high-speed CMOS
QUAD 2-CHANNEL MULTIPLEXER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS tecnology.
It is composed of an independent 2-channel
multiplexer with common SELECT and ENABLE
(OE)inputs. It is a non-inverting multiplexer. When
the ENABLE input is held HIGH, the outputs are
forced to a high impedance state. When the
SELECT input is held LOW, 鈥滱鈥?data is selected;
when SELECT input is held HIGH, 鈥滲鈥?data is
selected.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2001
1/11

74ACT257TTR 產(chǎn)品屬性

  • 2,500

  • 集成電路 (IC)

  • 邏輯 - 信號開關(guān)，多路復(fù)用器，解碼器

  • 74ACT

  • 多路復(fù)用器

  • 4 x 2:1

  • 1

  • 24mA，24mA

  • 單電源

  • 4.5 V ~ 5.5 V

  • -55°C ~ 125°C

  • 表面貼裝

  • 16-TSSOP（0.173"，4.40mm 寬）

  • 16-TSSOP

  • 帶卷 (TR)

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