74ACT11652
OCTAL BUS TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS
SCAS087A 鈥?APRIL 1993 鈥?REVISED APRIL 1996
D
D
D
D
D
D
Independent Registers and Enables for A
and B Buses
Multiplexed Real-Time and Stored Data
Flow-Through Architecture Optimizes
PCB Layout
Center-Pin V
CC
and GND Configurations
Minimize High-Speed Switching Noise
EPIC
t
(Enhanced-Performance Implanted
CMOS) 1-
m
m Process
500-mA Typical Latch-Up Immunity at
125擄C
DW PACKAGE
(TOP VIEW)
description
This device consists of bus transceiver circuits,
D-type flip-flops, and control circuitry arranged for
multiplexed transmission of data directly from the
data bus or from the internal storage registers.
Enable GAB and GBA are provided to control the
transceiver functions. SAB and SBA control pins
are provided to select whether real-time or stored
data is transferred. The circuitry used for select
control eliminates the typical decoding glitch that
occurs in a multiplexer during the transition
between stored and real-time data. A low input
level selects real-time data, and a high selects
stored data. Figure 1 illustrates the four
fundamental bus-management functions that can
be performed with the octal bus transceivers and
registers.
GAB
A1
A2
A3
A4
GND
GND
GND
GND
A5
A6
A7
A8
GBA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
CAB
SAB
B1
B2
B3
B4
V
CC
V
CC
B5
B6
B7
B8
CBA
SBA
Data on the A or B data bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the
appropriate clock pins (CAB or CBA), regardless of the select or enable control pins. When SAB and SBA are
in the real-time transfer mode, it is also possible to store data without using the internal D-type flip-flops by
simultaneously enabling GAB and GBA. In this configuration, each output reinforces its input. Thus, when all
other data sources to the two sets of bus lines are at high impedance, each set of bus lines remains at its last
state.
The 74ACT11652 is characterized for operation from 鈥?0擄C to 85擄C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright
漏
1996, Texas Instruments Incorporated
POST OFFICE BOX 655303
鈥?/div>
DALLAS, TEXAS 75265
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