鈮?/div>
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 02
IMPROVED LATCH-UP IMMUNITY
DIP
PACKAGE
DIP
SOP
TSSOP
SOP
ORDER CODES
T UBE
M74ACT02B
M74ACT02M
TSSOP
T& R
M74ACT02MTR
M74ACT02TTR
DESCRIPTION
The ACT02 is an advanced high-speed CMOS
QUAD 2-INPUT NOR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power applications mantaining high speed
operation similar to equivalent Bipolar Schottky
TTL.
The internal circuit is composed of 3 stages
including buffer output, which enables high noise
immunity and stable output.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
May 2000
1/8