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74ACQ543SPC Datasheet

  • 74ACQ543SPC

  • Quiet Series⑩ Octal Registered Transceiver with 3-STATE Out...

  • 96.22KB

  • 9頁

  • FAIRCHILD

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74ACQ543鈥?74ACTQ543 Quiet Series錚?Octal Registered Transceiver with 3-STATE Outputs
January 1990
Revised August 2000
74ACQ543鈥?74ACTQ543
Quiet Series
錚?/div>
Octal Registered Transceiver
with 3-STATE Outputs
General Description
The ACQ/ACTQ543 is a non-inverting octal transceiver
containing two sets of D-type registers for temporary stor-
age of data flowing in either direction. Separate Latch
Enable and Output Enable inputs are provided for each
register to permit independent input and output control in
either direction of data flow.
The ACQ/ACTQ utilizes Fairchild Quiet Series
錚?/div>
technol-
ogy to guarantee quiet output switching and improved
dynamic threshold performance FACT Quiet Series
錚?/div>
fea-
tures GTO
錚?/div>
output control and undershoot corrector in
addition to a split ground bus for superior performance.
Features
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed pin-to-pin skew AC performance
s
8-bit octal latched transceiver
s
Separate controls for data flow in each direction
s
Back-to-back registers for storage
s
Outputs source/sink 24 mA
s
300 mil slim PDIP/SOIC
Ordering Code:
Order Number
74ACQ543SC
74ACQ543SPC
74ACTQ543SC
74ACTQ543QSC
74ACTQ543SPC
Package Number
M24B
N24C
M24B
MQA24
N24C
Package Description
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the order code.
Connection Diagram
Pin Descriptions
Pin Names
OEAB
OEBA
CEAB
CEBA
LEAB
LEBA
A
0
鈥揂
7
Description
A-to-B Output Enable Input (Active LOW)
B-to-A Output Enable Input (Active LOW)
A-to-B Enable Input (Active LOW)
B-to-A Enable Input (Active LOW)
A-to-B Latch Enable Input (Active LOW)
B-to-A Latch Enable Input (Active LOW)
A-to-B Data Inputs or
B-to-A 3-STATE Outputs
B
0
鈥揃
7
B-to-A Data Inputs or
A-to-B 3-STATE Outputs
FACT錚? Quiet Series錚? FACT Quiet Series錚?and GTO錚?are trademarks of Fairchild Semiconductor Corporation.
漏 2000 Fairchild Semiconductor Corporation
DS010154
www.fairchildsemi.com

74ACQ543SPC 產(chǎn)品屬性

  • 375

  • 集成電路 (IC)

  • 邏輯 - 緩沖器，驅(qū)動器，接收器，收發(fā)器

  • 74ACQ

  • 收發(fā)器，非反相

  • 1

  • 8

  • 24mA，24mA

  • 2 V ~ 6 V

  • -40°C ~ 85°C

  • 通孔

  • 24-DIP（0.300"，7.62mm）

  • 24-PDIP

  • 管件

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