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74ACQ373 Datasheet

  • 74ACQ373

  • Quiet Series⑩ Octal Transparent Latch with 3-STATE Outputs

  • 99.23KB

  • 10頁(yè)

  • FAIRCHILD

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74ACQ373 鈥?74ACTQ373 Quiet Series錚?Octal Transparent Latch with 3-STATE Outputs
July 1989
Revised November 1999
74ACQ373 鈥?74ACTQ373
Quiet Series錚?Octal Transparent Latch
with 3-STATE Outputs
General Description
The ACQ/ACTQ373 consists of eight latches with 3-STATE
outputs for bus organized system applications. The latches
appear transparent to the data when Latch Enable (LE) is
HIGH. When LE is LOW, the data satisfying the input tim-
ing requirements is latched. Data appears on the bus when
the Output Enable (OE) is LOW. When OE is HIGH, the
bus output is in the HIGH impedance state.
The ACQ/ACTQ373 utilizes Fairchild Quiet Series錚?tech-
nology to guarantee quiet output switching and improve
dynamic threshold performance. features GTO錚?output
control and undershoot corrector in addition to a split
ground bus for superior performance.
Features
s
I
CC
and I
OZ
reduced by 50%
s
Guaranteed simultaneous switching noise level and
dynamic threshold performance
s
Guaranteed pin-to-pin skew AC performance
s
Improved latch up immunity
s
Eight latches in a single package
s
3-STATE outputs drive bus lines or buffer memory
address registers
s
Outputs source/sink 24 mA
s
Faster prop delays than the standard AC/ACT373
Ordering Code:
Order Number
74ACQ373SC
74ACQ373SJ
74ACQ373PC
74ACTQ373SC
74ACTQ373SJ
74ACQT373QSC
74ACTQ373PC
Package Number
M20B
M20D
N20A
M20B
M20D
MQA20
N20A
Package Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300鈥?Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001m 0.300鈥?Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300鈥?Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150鈥?Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001m 0.300鈥?Wide
Device also available in Tape and Reel. Specify by appending suffix letter 鈥淴鈥?to the ordering code.
Connection Diagram
Pin Descriptions
Pin Names
D
0
鈥揇
7
LE
OE
O
0
鈥揙
7
Description
Data Inputs
Latch Enable Input
Output Enable Input
3-STATE Latch Outputs
FACT錚? Quiet Series錚? FACT Quiet Series錚? and GTO錚?are trademarks of Fairchild Semiconductor Corporation.
漏 1999 Fairchild Semiconductor Corporation
DS010237
www.fairchildsemi.com

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